arch/x86: factor out and commonize HPET_BASE_ADDRESS definition

All x86 chipsets and SoCs have the HPET MMIO base address at 0xfed00000,
so define this once in arch/x86 and include this wherever needed. The
old AMD AGESA code in vendorcode that has its own definition is left
unchanged, but sb/amd/cimx/sb800/cfg.c is changed to use the new common
definition.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ifc624051cc6c0f125fa154e826cfbeaf41b4de83
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62304
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>

src/soc/amd/picasso/data_fabric.c

@@ -2,6 +2,7 @@
 
 #include <acpi/acpi_device.h>
 #include <amdblocks/data_fabric.h>
+#include <arch/hpet.h>
 #include <console/console.h>
 #include <cpu/x86/lapic_def.h>
 #include <device/device.h>

src/soc/amd/picasso/include/soc/iomap.h

@@ -10,7 +10,7 @@
 #define GNB_IO_APIC_ADDR		0xfec01000
 #define SPI_BASE_ADDRESS		0xfec10000
 
-#define HPET_BASE_ADDRESS		0xfed00000
+#include <arch/hpet.h> /* This will be removed in a follow-up patch */
 #if CONFIG_HPET_ADDRESS != HPET_BASE_ADDRESS
 #error HPET address must be 0xfed00000
 #endif