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src/cpu,soc/amd/common/block/cpu: Add preload_microcode

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This will enable preloading the microcode. By preloading the
file, into cbfs_cache we reduce boot time. 

BUG=b:179699789
TEST=Boot guybrush with CL chain and see microcode preloading and a
reduction of 1 ms.
| 112 - started reading uCode                         | 1.041     | 1.204     Δ(  0.16,    0.01%) |
| 113 - finished reading uCode                        | 1.365     | 0.011     Δ( -1.35,   -0.10%) |

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: If0c634c692c97769e71acd1175fc464dc592c356
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58963
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Raul E Rangel
2021-11-19 11:38:35 -07:00
committed by Raul Rangel
parent 6b446b991b
commit 4b5a490b6f
3 changed files with 20 additions and 2 deletions
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5
src/cpu/Makefile.inc
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@@ -56,7 +56,12 @@ $(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins))
cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
cpu_microcode_blob.bin-type := microcode
# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
cpu_microcode_blob.bin-align := 64
else
cpu_microcode_blob.bin-align := 16
endif
ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)