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nb/intel/pineview: Enable and allocate 8M for TSEG

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TSEG can be used as a stage cache and SMM can be relocated here.

Change-Id: Ifa3acce57f0c13eee326b7c203a43453c74c3161
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/25593
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans
2018-04-09 22:10:33 +02:00
committed by Patrick Georgi
parent e07df9d783
commit 4bdfebd4d8
2 changed files with 7 additions and 2 deletions
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src/northbridge/intel/pineview/pineview.h
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@ -62,7 +62,7 @@
#define REMAPBASE 0x98
#define REMAPLIMIT 0x9a
#define SMRAM 0x9d /* System Management RAM Control */
#define ESMRAM 0x9e /* Extended System Management RAM Control */
#define ESMRAMC 0x9e /* Extended System Management RAM Control */
#define TOM 0xa0
#define TOUUD 0xa2