mediatek/mt8183: Add watchdog timer support
Using common watchdog timer (WDT) code for reset. Set up watchdog timer in mtk_wdt_init() to get reset status and disable auto-reboot. Link common do_hard_reset() to support hard reset. BUG=b:80501386 BRANCH=none TEST=both mtk_wdt_init() and do_hard_reset() work on Kukui. Change-Id: I4be3a133dbb8a64604133cefb0c5f02d01afd0d4 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27026 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
committed by
Patrick Georgi
parent
53dabc29f2
commit
4c6dfbc2c1
@@ -1,27 +1,32 @@
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ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y)
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ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y)
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bootblock-y += bootblock.c
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bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c
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bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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bootblock-y += ../common/timer.c
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bootblock-y += ../common/timer.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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endif
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endif
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bootblock-y += ../common/wdt.c
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verstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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verstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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verstage-$(CONFIG_SPI_FLASH) += spi.c
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verstage-$(CONFIG_SPI_FLASH) += spi.c
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verstage-y += ../common/timer.c
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verstage-y += ../common/timer.c
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verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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verstage-y += ../common/wdt.c
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romstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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romstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-y += ../common/timer.c
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romstage-y += ../common/timer.c
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romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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romstage-y += ../common/wdt.c
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ramstage-y += ../common/cbmem.c emi.c
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ramstage-y += ../common/cbmem.c emi.c
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ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-y += ../common/timer.c
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ramstage-y += ../common/timer.c
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ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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ramstage-y += ../common/wdt.c
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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22
src/soc/mediatek/mt8183/bootblock.c
Normal file
22
src/soc/mediatek/mt8183/bootblock.c
Normal file
@@ -0,0 +1,22 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <bootblock_common.h>
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#include <soc/wdt.h>
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void bootblock_soc_init(void)
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{
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mtk_wdt_init();
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}
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@@ -22,6 +22,7 @@ enum {
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};
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};
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enum {
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enum {
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RGU_BASE = IO_PHYS + 0x00007000,
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GPT_BASE = IO_PHYS + 0x00008000,
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GPT_BASE = IO_PHYS + 0x00008000,
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UART0_BASE = IO_PHYS + 0x01002000,
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UART0_BASE = IO_PHYS + 0x01002000,
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};
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};
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