mb/google/kukui: kakadu: update the EDID and sequence
The EDID and command sequence are from BOE, the vendor. BUG=b:148997748 TEST=Boots on Chromebook Kakadu and displayed developer firmware screen successfully. Change-Id: Ieb510cb28882afc5b8023c2a57b31187e4a09fbd Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40396 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
committed by
Patrick Georgi
parent
5171960b23
commit
4cd150f5b5
@@ -10,18 +10,18 @@ struct panel_serializable_data BOE_TV105WUM_NW0 = {
|
|||||||
.panel_bits_per_color = 8,
|
.panel_bits_per_color = 8,
|
||||||
.panel_bits_per_pixel = 24,
|
.panel_bits_per_pixel = 24,
|
||||||
.mode = {
|
.mode = {
|
||||||
.pixel_clock = 156298,
|
.pixel_clock = 159916,
|
||||||
.lvds_dual_channel = 0,
|
.lvds_dual_channel = 0,
|
||||||
.refresh = 60,
|
.refresh = 60,
|
||||||
.ha = 1200, .hbl = 140, .hso = 60, .hspw = 24,
|
.ha = 1200, .hbl = 164, .hso = 80, .hspw = 24,
|
||||||
.va = 1920, .vbl = 24, .vso = 14, .vspw = 2,
|
.va = 1920, .vbl = 34, .vso = 20, .vspw = 4,
|
||||||
.phsync = '-', .pvsync = '-',
|
.phsync = '-', .pvsync = '-',
|
||||||
.x_mm = 147, .y_mm = 236,
|
.x_mm = 147, .y_mm = 236,
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
|
.orientation = LB_FB_ORIENTATION_LEFT_UP,
|
||||||
.init = {
|
.init = {
|
||||||
INIT_DCS_CMD(0x10),
|
INIT_DELAY_CMD(24),
|
||||||
INIT_DELAY_CMD(34),
|
|
||||||
INIT_DCS_CMD(0xB0, 0x05),
|
INIT_DCS_CMD(0xB0, 0x05),
|
||||||
INIT_DCS_CMD(0xB1, 0xE5),
|
INIT_DCS_CMD(0xB1, 0xE5),
|
||||||
INIT_DCS_CMD(0xB3, 0x52),
|
INIT_DCS_CMD(0xB3, 0x52),
|
||||||
@@ -34,9 +34,9 @@ struct panel_serializable_data BOE_TV105WUM_NW0 = {
|
|||||||
INIT_DCS_CMD(0xBA, 0x87),
|
INIT_DCS_CMD(0xBA, 0x87),
|
||||||
INIT_DCS_CMD(0xBF, 0x1F),
|
INIT_DCS_CMD(0xBF, 0x1F),
|
||||||
INIT_DCS_CMD(0xC0, 0x0F),
|
INIT_DCS_CMD(0xC0, 0x0F),
|
||||||
INIT_DCS_CMD(0xC2, 0x0E),
|
INIT_DCS_CMD(0xC2, 0x0C),
|
||||||
INIT_DCS_CMD(0xC3, 0x02),
|
INIT_DCS_CMD(0xC3, 0x02),
|
||||||
INIT_DCS_CMD(0xC4, 0x0E),
|
INIT_DCS_CMD(0xC4, 0x0C),
|
||||||
INIT_DCS_CMD(0xC5, 0x02),
|
INIT_DCS_CMD(0xC5, 0x02),
|
||||||
INIT_DCS_CMD(0xB0, 0x01),
|
INIT_DCS_CMD(0xB0, 0x01),
|
||||||
INIT_DCS_CMD(0xE0, 0x26),
|
INIT_DCS_CMD(0xE0, 0x26),
|
||||||
@@ -69,38 +69,38 @@ struct panel_serializable_data BOE_TV105WUM_NW0 = {
|
|||||||
INIT_DCS_CMD(0xDF, 0x08),
|
INIT_DCS_CMD(0xDF, 0x08),
|
||||||
INIT_DCS_CMD(0xB0, 0x02),
|
INIT_DCS_CMD(0xB0, 0x02),
|
||||||
INIT_DCS_CMD(0xC0, 0x00),
|
INIT_DCS_CMD(0xC0, 0x00),
|
||||||
INIT_DCS_CMD(0xC1, 0x11),
|
INIT_DCS_CMD(0xC1, 0x0F),
|
||||||
INIT_DCS_CMD(0xC2, 0x1D),
|
INIT_DCS_CMD(0xC2, 0x1A),
|
||||||
INIT_DCS_CMD(0xC3, 0x2E),
|
INIT_DCS_CMD(0xC3, 0x2B),
|
||||||
INIT_DCS_CMD(0xC4, 0x3F),
|
INIT_DCS_CMD(0xC4, 0x38),
|
||||||
INIT_DCS_CMD(0xC5, 0x3F),
|
INIT_DCS_CMD(0xC5, 0x39),
|
||||||
INIT_DCS_CMD(0xC6, 0x3F),
|
INIT_DCS_CMD(0xC6, 0x38),
|
||||||
INIT_DCS_CMD(0xC7, 0x3F),
|
INIT_DCS_CMD(0xC7, 0x38),
|
||||||
INIT_DCS_CMD(0xC8, 0x3F),
|
INIT_DCS_CMD(0xC8, 0x36),
|
||||||
INIT_DCS_CMD(0xC9, 0x3F),
|
INIT_DCS_CMD(0xC9, 0x34),
|
||||||
INIT_DCS_CMD(0xCA, 0x3F),
|
INIT_DCS_CMD(0xCA, 0x35),
|
||||||
INIT_DCS_CMD(0xCB, 0x3F),
|
INIT_DCS_CMD(0xCB, 0x36),
|
||||||
INIT_DCS_CMD(0xCC, 0x3F),
|
INIT_DCS_CMD(0xCC, 0x39),
|
||||||
INIT_DCS_CMD(0xCD, 0x33),
|
INIT_DCS_CMD(0xCD, 0x2D),
|
||||||
INIT_DCS_CMD(0xCE, 0x32),
|
INIT_DCS_CMD(0xCE, 0x2E),
|
||||||
INIT_DCS_CMD(0xCF, 0x31),
|
INIT_DCS_CMD(0xCF, 0x2F),
|
||||||
INIT_DCS_CMD(0xD0, 0x07),
|
INIT_DCS_CMD(0xD0, 0x07),
|
||||||
INIT_DCS_CMD(0xD2, 0x00),
|
INIT_DCS_CMD(0xD2, 0x00),
|
||||||
INIT_DCS_CMD(0xD3, 0x11),
|
INIT_DCS_CMD(0xD3, 0x0F),
|
||||||
INIT_DCS_CMD(0xD4, 0x1D),
|
INIT_DCS_CMD(0xD4, 0x1A),
|
||||||
INIT_DCS_CMD(0xD5, 0x2E),
|
INIT_DCS_CMD(0xD5, 0x2B),
|
||||||
INIT_DCS_CMD(0xD6, 0x3F),
|
INIT_DCS_CMD(0xD6, 0x38),
|
||||||
INIT_DCS_CMD(0xD7, 0x3F),
|
INIT_DCS_CMD(0xD7, 0x39),
|
||||||
INIT_DCS_CMD(0xD8, 0x3F),
|
INIT_DCS_CMD(0xD8, 0x38),
|
||||||
INIT_DCS_CMD(0xD9, 0x3F),
|
INIT_DCS_CMD(0xD9, 0x38),
|
||||||
INIT_DCS_CMD(0xDA, 0x3F),
|
INIT_DCS_CMD(0xDA, 0x36),
|
||||||
INIT_DCS_CMD(0xDB, 0x3F),
|
INIT_DCS_CMD(0xDB, 0x34),
|
||||||
INIT_DCS_CMD(0xDC, 0x3F),
|
INIT_DCS_CMD(0xDC, 0x35),
|
||||||
INIT_DCS_CMD(0xDD, 0x3F),
|
INIT_DCS_CMD(0xDD, 0x36),
|
||||||
INIT_DCS_CMD(0xDE, 0x3F),
|
INIT_DCS_CMD(0xDE, 0x39),
|
||||||
INIT_DCS_CMD(0xDF, 0x33),
|
INIT_DCS_CMD(0xDF, 0x2D),
|
||||||
INIT_DCS_CMD(0xE0, 0x32),
|
INIT_DCS_CMD(0xE0, 0x2E),
|
||||||
INIT_DCS_CMD(0xE1, 0x31),
|
INIT_DCS_CMD(0xE1, 0x2F),
|
||||||
INIT_DCS_CMD(0xE2, 0x07),
|
INIT_DCS_CMD(0xE2, 0x07),
|
||||||
INIT_DCS_CMD(0xB0, 0x03),
|
INIT_DCS_CMD(0xB0, 0x03),
|
||||||
INIT_DCS_CMD(0xC8, 0x0B),
|
INIT_DCS_CMD(0xC8, 0x0B),
|
||||||
@@ -122,90 +122,90 @@ struct panel_serializable_data BOE_TV105WUM_NW0 = {
|
|||||||
INIT_DCS_CMD(0xBC, 0x33),
|
INIT_DCS_CMD(0xBC, 0x33),
|
||||||
INIT_DCS_CMD(0xB0, 0x07),
|
INIT_DCS_CMD(0xB0, 0x07),
|
||||||
INIT_DCS_CMD(0xB1, 0x00),
|
INIT_DCS_CMD(0xB1, 0x00),
|
||||||
INIT_DCS_CMD(0xB2, 0x02),
|
INIT_DCS_CMD(0xB2, 0x04),
|
||||||
INIT_DCS_CMD(0xB3, 0x0B),
|
INIT_DCS_CMD(0xB3, 0x0A),
|
||||||
INIT_DCS_CMD(0xB4, 0x1A),
|
INIT_DCS_CMD(0xB4, 0x1A),
|
||||||
INIT_DCS_CMD(0xB5, 0x29),
|
INIT_DCS_CMD(0xB5, 0x29),
|
||||||
INIT_DCS_CMD(0xB6, 0x38),
|
INIT_DCS_CMD(0xB6, 0x38),
|
||||||
INIT_DCS_CMD(0xB7, 0x58),
|
INIT_DCS_CMD(0xB7, 0x5A),
|
||||||
INIT_DCS_CMD(0xB8, 0x76),
|
INIT_DCS_CMD(0xB8, 0x79),
|
||||||
INIT_DCS_CMD(0xB9, 0xB9),
|
INIT_DCS_CMD(0xB9, 0xBF),
|
||||||
INIT_DCS_CMD(0xBA, 0xF7),
|
INIT_DCS_CMD(0xBA, 0x05),
|
||||||
INIT_DCS_CMD(0xBB, 0x6D),
|
INIT_DCS_CMD(0xBB, 0x88),
|
||||||
INIT_DCS_CMD(0xBC, 0xE5),
|
INIT_DCS_CMD(0xBC, 0x14),
|
||||||
INIT_DCS_CMD(0xBD, 0xE9),
|
INIT_DCS_CMD(0xBD, 0x18),
|
||||||
INIT_DCS_CMD(0xBE, 0x5E),
|
INIT_DCS_CMD(0xBE, 0x97),
|
||||||
INIT_DCS_CMD(0xBF, 0xD6),
|
INIT_DCS_CMD(0xBF, 0x11),
|
||||||
INIT_DCS_CMD(0xC0, 0x15),
|
INIT_DCS_CMD(0xC0, 0x4B),
|
||||||
INIT_DCS_CMD(0xC1, 0x51),
|
INIT_DCS_CMD(0xC1, 0x82),
|
||||||
INIT_DCS_CMD(0xC2, 0x71),
|
INIT_DCS_CMD(0xC2, 0x9B),
|
||||||
INIT_DCS_CMD(0xC3, 0x90),
|
INIT_DCS_CMD(0xC3, 0xB6),
|
||||||
INIT_DCS_CMD(0xC4, 0x9C),
|
INIT_DCS_CMD(0xC4, 0xC3),
|
||||||
INIT_DCS_CMD(0xC5, 0xA8),
|
INIT_DCS_CMD(0xC5, 0xD0),
|
||||||
INIT_DCS_CMD(0xC6, 0xB5),
|
INIT_DCS_CMD(0xC6, 0xDB),
|
||||||
INIT_DCS_CMD(0xC7, 0xBC),
|
INIT_DCS_CMD(0xC7, 0xE1),
|
||||||
INIT_DCS_CMD(0xC8, 0xC0),
|
INIT_DCS_CMD(0xC8, 0xE4),
|
||||||
INIT_DCS_CMD(0xC9, 0x00),
|
INIT_DCS_CMD(0xC9, 0x00),
|
||||||
INIT_DCS_CMD(0xCA, 0x00),
|
INIT_DCS_CMD(0xCA, 0x00),
|
||||||
INIT_DCS_CMD(0xCB, 0x05),
|
INIT_DCS_CMD(0xCB, 0x16),
|
||||||
INIT_DCS_CMD(0xCC, 0x6B),
|
INIT_DCS_CMD(0xCC, 0xAF),
|
||||||
INIT_DCS_CMD(0xCD, 0xFF),
|
INIT_DCS_CMD(0xCD, 0xFF),
|
||||||
INIT_DCS_CMD(0xCE, 0xFF),
|
INIT_DCS_CMD(0xCE, 0xFF),
|
||||||
INIT_DCS_CMD(0xB0, 0x08),
|
INIT_DCS_CMD(0xB0, 0x08),
|
||||||
INIT_DCS_CMD(0xB1, 0x00),
|
INIT_DCS_CMD(0xB1, 0x00),
|
||||||
INIT_DCS_CMD(0xB2, 0x04),
|
INIT_DCS_CMD(0xB2, 0x03),
|
||||||
INIT_DCS_CMD(0xB3, 0x0B),
|
INIT_DCS_CMD(0xB3, 0x0A),
|
||||||
INIT_DCS_CMD(0xB4, 0x1A),
|
INIT_DCS_CMD(0xB4, 0x1A),
|
||||||
INIT_DCS_CMD(0xB5, 0x29),
|
INIT_DCS_CMD(0xB5, 0x29),
|
||||||
INIT_DCS_CMD(0xB6, 0x38),
|
INIT_DCS_CMD(0xB6, 0x38),
|
||||||
INIT_DCS_CMD(0xB7, 0x58),
|
INIT_DCS_CMD(0xB7, 0x5A),
|
||||||
INIT_DCS_CMD(0xB8, 0x76),
|
INIT_DCS_CMD(0xB8, 0x7A),
|
||||||
INIT_DCS_CMD(0xB9, 0xB8),
|
INIT_DCS_CMD(0xB9, 0xC1),
|
||||||
INIT_DCS_CMD(0xBA, 0xF7),
|
INIT_DCS_CMD(0xBA, 0x07),
|
||||||
INIT_DCS_CMD(0xBB, 0x6C),
|
INIT_DCS_CMD(0xBB, 0x8B),
|
||||||
INIT_DCS_CMD(0xBC, 0xE3),
|
INIT_DCS_CMD(0xBC, 0x17),
|
||||||
INIT_DCS_CMD(0xBD, 0xE7),
|
INIT_DCS_CMD(0xBD, 0x1B),
|
||||||
INIT_DCS_CMD(0xBE, 0x5C),
|
INIT_DCS_CMD(0xBE, 0x99),
|
||||||
INIT_DCS_CMD(0xBF, 0xD3),
|
INIT_DCS_CMD(0xBF, 0x13),
|
||||||
INIT_DCS_CMD(0xC0, 0x10),
|
INIT_DCS_CMD(0xC0, 0x4C),
|
||||||
INIT_DCS_CMD(0xC1, 0x4C),
|
INIT_DCS_CMD(0xC1, 0x84),
|
||||||
INIT_DCS_CMD(0xC2, 0x6A),
|
INIT_DCS_CMD(0xC2, 0x9D),
|
||||||
INIT_DCS_CMD(0xC3, 0x8A),
|
INIT_DCS_CMD(0xC3, 0xB7),
|
||||||
INIT_DCS_CMD(0xC4, 0x96),
|
INIT_DCS_CMD(0xC4, 0xC4),
|
||||||
INIT_DCS_CMD(0xC5, 0xA2),
|
INIT_DCS_CMD(0xC5, 0xD0),
|
||||||
INIT_DCS_CMD(0xC6, 0xAE),
|
INIT_DCS_CMD(0xC6, 0xDB),
|
||||||
INIT_DCS_CMD(0xC7, 0xB4),
|
INIT_DCS_CMD(0xC7, 0xE1),
|
||||||
INIT_DCS_CMD(0xC8, 0xB8),
|
INIT_DCS_CMD(0xC8, 0xE4),
|
||||||
INIT_DCS_CMD(0xC9, 0x00),
|
INIT_DCS_CMD(0xC9, 0x00),
|
||||||
INIT_DCS_CMD(0xCA, 0x00),
|
INIT_DCS_CMD(0xCA, 0x00),
|
||||||
INIT_DCS_CMD(0xCB, 0x05),
|
INIT_DCS_CMD(0xCB, 0x16),
|
||||||
INIT_DCS_CMD(0xCC, 0x6B),
|
INIT_DCS_CMD(0xCC, 0xAF),
|
||||||
INIT_DCS_CMD(0xCD, 0xFF),
|
INIT_DCS_CMD(0xCD, 0xFF),
|
||||||
INIT_DCS_CMD(0xCE, 0xFF),
|
INIT_DCS_CMD(0xCE, 0xFF),
|
||||||
INIT_DCS_CMD(0xB0, 0x09),
|
INIT_DCS_CMD(0xB0, 0x09),
|
||||||
INIT_DCS_CMD(0xB1, 0x04),
|
INIT_DCS_CMD(0xB1, 0x04),
|
||||||
INIT_DCS_CMD(0xB2, 0x04),
|
INIT_DCS_CMD(0xB2, 0x04),
|
||||||
INIT_DCS_CMD(0xB3, 0x0C),
|
INIT_DCS_CMD(0xB3, 0x09),
|
||||||
INIT_DCS_CMD(0xB4, 0x1C),
|
INIT_DCS_CMD(0xB4, 0x1A),
|
||||||
INIT_DCS_CMD(0xB5, 0x2D),
|
INIT_DCS_CMD(0xB5, 0x2B),
|
||||||
INIT_DCS_CMD(0xB6, 0x3C),
|
INIT_DCS_CMD(0xB6, 0x3A),
|
||||||
INIT_DCS_CMD(0xB7, 0x5F),
|
INIT_DCS_CMD(0xB7, 0x5D),
|
||||||
INIT_DCS_CMD(0xB8, 0x80),
|
INIT_DCS_CMD(0xB8, 0x80),
|
||||||
INIT_DCS_CMD(0xB9, 0xC8),
|
INIT_DCS_CMD(0xB9, 0xCA),
|
||||||
INIT_DCS_CMD(0xBA, 0x0D),
|
INIT_DCS_CMD(0xBA, 0x13),
|
||||||
INIT_DCS_CMD(0xBB, 0x8A),
|
INIT_DCS_CMD(0xBB, 0x9D),
|
||||||
INIT_DCS_CMD(0xBC, 0x10),
|
INIT_DCS_CMD(0xBC, 0x30),
|
||||||
INIT_DCS_CMD(0xBD, 0x14),
|
INIT_DCS_CMD(0xBD, 0x34),
|
||||||
INIT_DCS_CMD(0xBE, 0x91),
|
INIT_DCS_CMD(0xBE, 0xBB),
|
||||||
INIT_DCS_CMD(0xBF, 0x13),
|
INIT_DCS_CMD(0xBF, 0x30),
|
||||||
INIT_DCS_CMD(0xC0, 0x53),
|
INIT_DCS_CMD(0xC0, 0x6A),
|
||||||
INIT_DCS_CMD(0xC1, 0x93),
|
INIT_DCS_CMD(0xC1, 0xA1),
|
||||||
INIT_DCS_CMD(0xC2, 0xAB),
|
INIT_DCS_CMD(0xC2, 0xBC),
|
||||||
INIT_DCS_CMD(0xC3, 0xC6),
|
INIT_DCS_CMD(0xC3, 0xD4),
|
||||||
INIT_DCS_CMD(0xC4, 0xD6),
|
INIT_DCS_CMD(0xC4, 0xE0),
|
||||||
INIT_DCS_CMD(0xC5, 0xE4),
|
INIT_DCS_CMD(0xC5, 0xEB),
|
||||||
INIT_DCS_CMD(0xC6, 0xF3),
|
INIT_DCS_CMD(0xC6, 0xF6),
|
||||||
INIT_DCS_CMD(0xC7, 0xF9),
|
INIT_DCS_CMD(0xC7, 0xFA),
|
||||||
INIT_DCS_CMD(0xC8, 0xFC),
|
INIT_DCS_CMD(0xC8, 0xFC),
|
||||||
INIT_DCS_CMD(0xC9, 0x00),
|
INIT_DCS_CMD(0xC9, 0x00),
|
||||||
INIT_DCS_CMD(0xCA, 0x00),
|
INIT_DCS_CMD(0xCA, 0x00),
|
||||||
@@ -215,90 +215,90 @@ struct panel_serializable_data BOE_TV105WUM_NW0 = {
|
|||||||
INIT_DCS_CMD(0xCE, 0xFF),
|
INIT_DCS_CMD(0xCE, 0xFF),
|
||||||
INIT_DCS_CMD(0xB0, 0x0A),
|
INIT_DCS_CMD(0xB0, 0x0A),
|
||||||
INIT_DCS_CMD(0xB1, 0x00),
|
INIT_DCS_CMD(0xB1, 0x00),
|
||||||
INIT_DCS_CMD(0xB2, 0x02),
|
INIT_DCS_CMD(0xB2, 0x04),
|
||||||
INIT_DCS_CMD(0xB3, 0x0B),
|
INIT_DCS_CMD(0xB3, 0x0A),
|
||||||
INIT_DCS_CMD(0xB4, 0x1A),
|
INIT_DCS_CMD(0xB4, 0x1A),
|
||||||
INIT_DCS_CMD(0xB5, 0x29),
|
INIT_DCS_CMD(0xB5, 0x29),
|
||||||
INIT_DCS_CMD(0xB6, 0x38),
|
INIT_DCS_CMD(0xB6, 0x38),
|
||||||
INIT_DCS_CMD(0xB7, 0x58),
|
INIT_DCS_CMD(0xB7, 0x5A),
|
||||||
INIT_DCS_CMD(0xB8, 0x76),
|
INIT_DCS_CMD(0xB8, 0x79),
|
||||||
INIT_DCS_CMD(0xB9, 0xB9),
|
INIT_DCS_CMD(0xB9, 0xBF),
|
||||||
INIT_DCS_CMD(0xBA, 0xF7),
|
INIT_DCS_CMD(0xBA, 0x05),
|
||||||
INIT_DCS_CMD(0xBB, 0x6D),
|
INIT_DCS_CMD(0xBB, 0x88),
|
||||||
INIT_DCS_CMD(0xBC, 0xE5),
|
INIT_DCS_CMD(0xBC, 0x14),
|
||||||
INIT_DCS_CMD(0xBD, 0xE9),
|
INIT_DCS_CMD(0xBD, 0x18),
|
||||||
INIT_DCS_CMD(0xBE, 0x5E),
|
INIT_DCS_CMD(0xBE, 0x97),
|
||||||
INIT_DCS_CMD(0xBF, 0xD6),
|
INIT_DCS_CMD(0xBF, 0x11),
|
||||||
INIT_DCS_CMD(0xC0, 0x15),
|
INIT_DCS_CMD(0xC0, 0x4B),
|
||||||
INIT_DCS_CMD(0xC1, 0x51),
|
INIT_DCS_CMD(0xC1, 0x82),
|
||||||
INIT_DCS_CMD(0xC2, 0x71),
|
INIT_DCS_CMD(0xC2, 0x9B),
|
||||||
INIT_DCS_CMD(0xC3, 0x90),
|
INIT_DCS_CMD(0xC3, 0xB6),
|
||||||
INIT_DCS_CMD(0xC4, 0x9C),
|
INIT_DCS_CMD(0xC4, 0xC3),
|
||||||
INIT_DCS_CMD(0xC5, 0xA8),
|
INIT_DCS_CMD(0xC5, 0xD0),
|
||||||
INIT_DCS_CMD(0xC6, 0xB5),
|
INIT_DCS_CMD(0xC6, 0xDB),
|
||||||
INIT_DCS_CMD(0xC7, 0xBC),
|
INIT_DCS_CMD(0xC7, 0xE1),
|
||||||
INIT_DCS_CMD(0xC8, 0xC0),
|
INIT_DCS_CMD(0xC8, 0xE4),
|
||||||
INIT_DCS_CMD(0xC9, 0x00),
|
INIT_DCS_CMD(0xC9, 0x00),
|
||||||
INIT_DCS_CMD(0xCA, 0x00),
|
INIT_DCS_CMD(0xCA, 0x00),
|
||||||
INIT_DCS_CMD(0xCB, 0x05),
|
INIT_DCS_CMD(0xCB, 0x16),
|
||||||
INIT_DCS_CMD(0xCC, 0x6B),
|
INIT_DCS_CMD(0xCC, 0xAF),
|
||||||
INIT_DCS_CMD(0xCD, 0xFF),
|
INIT_DCS_CMD(0xCD, 0xFF),
|
||||||
INIT_DCS_CMD(0xCE, 0xFF),
|
INIT_DCS_CMD(0xCE, 0xFF),
|
||||||
INIT_DCS_CMD(0xB0, 0x0B),
|
INIT_DCS_CMD(0xB0, 0x0B),
|
||||||
INIT_DCS_CMD(0xB1, 0x00),
|
INIT_DCS_CMD(0xB1, 0x00),
|
||||||
INIT_DCS_CMD(0xB2, 0x04),
|
INIT_DCS_CMD(0xB2, 0x03),
|
||||||
INIT_DCS_CMD(0xB3, 0x0B),
|
INIT_DCS_CMD(0xB3, 0x0A),
|
||||||
INIT_DCS_CMD(0xB4, 0x1A),
|
INIT_DCS_CMD(0xB4, 0x1A),
|
||||||
INIT_DCS_CMD(0xB5, 0x29),
|
INIT_DCS_CMD(0xB5, 0x29),
|
||||||
INIT_DCS_CMD(0xB6, 0x38),
|
INIT_DCS_CMD(0xB6, 0x38),
|
||||||
INIT_DCS_CMD(0xB7, 0x58),
|
INIT_DCS_CMD(0xB7, 0x5A),
|
||||||
INIT_DCS_CMD(0xB8, 0x76),
|
INIT_DCS_CMD(0xB8, 0x7A),
|
||||||
INIT_DCS_CMD(0xB9, 0xB8),
|
INIT_DCS_CMD(0xB9, 0xC1),
|
||||||
INIT_DCS_CMD(0xBA, 0xF7),
|
INIT_DCS_CMD(0xBA, 0x07),
|
||||||
INIT_DCS_CMD(0xBB, 0x6C),
|
INIT_DCS_CMD(0xBB, 0x8B),
|
||||||
INIT_DCS_CMD(0xBC, 0xE3),
|
INIT_DCS_CMD(0xBC, 0x17),
|
||||||
INIT_DCS_CMD(0xBD, 0xE7),
|
INIT_DCS_CMD(0xBD, 0x1B),
|
||||||
INIT_DCS_CMD(0xBE, 0x5C),
|
INIT_DCS_CMD(0xBE, 0x99),
|
||||||
INIT_DCS_CMD(0xBF, 0xD3),
|
INIT_DCS_CMD(0xBF, 0x13),
|
||||||
INIT_DCS_CMD(0xC0, 0x10),
|
INIT_DCS_CMD(0xC0, 0x4C),
|
||||||
INIT_DCS_CMD(0xC1, 0x4C),
|
INIT_DCS_CMD(0xC1, 0x84),
|
||||||
INIT_DCS_CMD(0xC2, 0x6A),
|
INIT_DCS_CMD(0xC2, 0x9D),
|
||||||
INIT_DCS_CMD(0xC3, 0x8A),
|
INIT_DCS_CMD(0xC3, 0xB7),
|
||||||
INIT_DCS_CMD(0xC4, 0x96),
|
INIT_DCS_CMD(0xC4, 0xC4),
|
||||||
INIT_DCS_CMD(0xC5, 0xA2),
|
INIT_DCS_CMD(0xC5, 0xD0),
|
||||||
INIT_DCS_CMD(0xC6, 0xAE),
|
INIT_DCS_CMD(0xC6, 0xDB),
|
||||||
INIT_DCS_CMD(0xC7, 0xB4),
|
INIT_DCS_CMD(0xC7, 0xE1),
|
||||||
INIT_DCS_CMD(0xC8, 0xB8),
|
INIT_DCS_CMD(0xC8, 0xE4),
|
||||||
INIT_DCS_CMD(0xC9, 0x00),
|
INIT_DCS_CMD(0xC9, 0x00),
|
||||||
INIT_DCS_CMD(0xCA, 0x00),
|
INIT_DCS_CMD(0xCA, 0x00),
|
||||||
INIT_DCS_CMD(0xCB, 0x05),
|
INIT_DCS_CMD(0xCB, 0x16),
|
||||||
INIT_DCS_CMD(0xCC, 0x6B),
|
INIT_DCS_CMD(0xCC, 0xAF),
|
||||||
INIT_DCS_CMD(0xCD, 0xFF),
|
INIT_DCS_CMD(0xCD, 0xFF),
|
||||||
INIT_DCS_CMD(0xCE, 0xFF),
|
INIT_DCS_CMD(0xCE, 0xFF),
|
||||||
INIT_DCS_CMD(0xB0, 0x0C),
|
INIT_DCS_CMD(0xB0, 0x0C),
|
||||||
INIT_DCS_CMD(0xB1, 0x04),
|
INIT_DCS_CMD(0xB1, 0x04),
|
||||||
INIT_DCS_CMD(0xB2, 0x04),
|
INIT_DCS_CMD(0xB2, 0x04),
|
||||||
INIT_DCS_CMD(0xB3, 0x0C),
|
INIT_DCS_CMD(0xB3, 0x09),
|
||||||
INIT_DCS_CMD(0xB4, 0x1C),
|
INIT_DCS_CMD(0xB4, 0x1A),
|
||||||
INIT_DCS_CMD(0xB5, 0x2D),
|
INIT_DCS_CMD(0xB5, 0x2B),
|
||||||
INIT_DCS_CMD(0xB6, 0x3C),
|
INIT_DCS_CMD(0xB6, 0x3A),
|
||||||
INIT_DCS_CMD(0xB7, 0x5F),
|
INIT_DCS_CMD(0xB7, 0x5D),
|
||||||
INIT_DCS_CMD(0xB8, 0x80),
|
INIT_DCS_CMD(0xB8, 0x80),
|
||||||
INIT_DCS_CMD(0xB9, 0xC8),
|
INIT_DCS_CMD(0xB9, 0xCA),
|
||||||
INIT_DCS_CMD(0xBA, 0x0D),
|
INIT_DCS_CMD(0xBA, 0x13),
|
||||||
INIT_DCS_CMD(0xBB, 0x8A),
|
INIT_DCS_CMD(0xBB, 0x9D),
|
||||||
INIT_DCS_CMD(0xBC, 0x10),
|
INIT_DCS_CMD(0xBC, 0x30),
|
||||||
INIT_DCS_CMD(0xBD, 0x14),
|
INIT_DCS_CMD(0xBD, 0x34),
|
||||||
INIT_DCS_CMD(0xBE, 0x91),
|
INIT_DCS_CMD(0xBE, 0xBB),
|
||||||
INIT_DCS_CMD(0xBF, 0x13),
|
INIT_DCS_CMD(0xBF, 0x30),
|
||||||
INIT_DCS_CMD(0xC0, 0x53),
|
INIT_DCS_CMD(0xC0, 0x6A),
|
||||||
INIT_DCS_CMD(0xC1, 0x93),
|
INIT_DCS_CMD(0xC1, 0xA1),
|
||||||
INIT_DCS_CMD(0xC2, 0xAB),
|
INIT_DCS_CMD(0xC2, 0xBC),
|
||||||
INIT_DCS_CMD(0xC3, 0xC6),
|
INIT_DCS_CMD(0xC3, 0xD4),
|
||||||
INIT_DCS_CMD(0xC4, 0xD6),
|
INIT_DCS_CMD(0xC4, 0xE0),
|
||||||
INIT_DCS_CMD(0xC5, 0xE4),
|
INIT_DCS_CMD(0xC5, 0xEB),
|
||||||
INIT_DCS_CMD(0xC6, 0xF3),
|
INIT_DCS_CMD(0xC6, 0xF6),
|
||||||
INIT_DCS_CMD(0xC7, 0xF9),
|
INIT_DCS_CMD(0xC7, 0xFA),
|
||||||
INIT_DCS_CMD(0xC8, 0xFC),
|
INIT_DCS_CMD(0xC8, 0xFC),
|
||||||
INIT_DCS_CMD(0xC9, 0x00),
|
INIT_DCS_CMD(0xC9, 0x00),
|
||||||
INIT_DCS_CMD(0xCA, 0x00),
|
INIT_DCS_CMD(0xCA, 0x00),
|
||||||
@@ -306,16 +306,11 @@ struct panel_serializable_data BOE_TV105WUM_NW0 = {
|
|||||||
INIT_DCS_CMD(0xCC, 0xAF),
|
INIT_DCS_CMD(0xCC, 0xAF),
|
||||||
INIT_DCS_CMD(0xCD, 0xFF),
|
INIT_DCS_CMD(0xCD, 0xFF),
|
||||||
INIT_DCS_CMD(0xCE, 0xFF),
|
INIT_DCS_CMD(0xCE, 0xFF),
|
||||||
INIT_DELAY_CMD(100),
|
|
||||||
INIT_DCS_CMD(0xB0, 0x00),
|
INIT_DCS_CMD(0xB0, 0x00),
|
||||||
INIT_DCS_CMD(0xB3, 0x08),
|
INIT_DCS_CMD(0xB3, 0x08),
|
||||||
INIT_DCS_CMD(0xB0, 0x04),
|
INIT_DCS_CMD(0xB0, 0x04),
|
||||||
INIT_DCS_CMD(0xB8, 0x68),
|
INIT_DCS_CMD(0xB8, 0x68),
|
||||||
INIT_DELAY_CMD(10),
|
INIT_DELAY_CMD(150),
|
||||||
INIT_DCS_CMD(0x11),
|
|
||||||
INIT_DELAY_CMD(100),
|
|
||||||
INIT_DCS_CMD(0x29),
|
|
||||||
INIT_DELAY_CMD(50),
|
|
||||||
INIT_END_CMD,
|
INIT_END_CMD,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
Reference in New Issue
Block a user