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Fix the static device tree of the Tyan S1846. Especially the

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Super I/O part was incorrect.

Also, add ide0_enable/ide1_enable variables, and enable both the
primary and secondary IDE interface per default.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann
2007-06-03 20:39:47 +00:00
parent 56a9125453
commit 4ce039feee
1 changed files with 41 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

42
src/mainboard/tyan/s1846/Config.lb
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@@ -125,38 +125,46 @@ mainboardinit cpu/x86/mmx/disable_mmx.inc
dir /pc80
config chip.h
# TODO.
chip northbridge/intel/i440bx # Northbridge
device pci_domain 0 on
device pci 0.0 on end # Host bridge
device pci 1.0 off end # PCI bridge TODO: AGP bridge?
# device pci 7.0 on end # ISA bridge
device pci 1.0 on end # AGP bridge
chip southbridge/intel/i82371eb # Southbridge
device pci 7.0 on # ISA bridge ???
device pci 7.0 on # ISA bridge
chip superio/nsc/pc87309 # Super I/O
device pnp 2e.0 on end # Floppy
device pnp 2e.1 on end # Parallel port
device pnp 2e.2 on end # Com2
device pnp 2e.3 on # Com1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.4 on end # Power mgmt.
device pnp 2e.5 on end # Mouse
device pnp 2e.6 on # Keyboard
device pnp 2e.5 on # Keyboard + Mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
irq 0x72 = 12 # ???
irq 0x72 = 12
end
device pnp 2e.b on # Com1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.c on # Com2 / IR
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.d on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 2e.f on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
end
end
device pci 7.1 on end # IDE
device pci 7.2 on end # USB
device pci 7.3 on end # ACPI
register "ide0_enable" = "1"
register "ide1_enable" = "1"
end
end
end
chip cpu/intel/slot_2
chip cpu/intel/slot_2 # CPU
end
end