soc/intel/common,mtl: Refactor BERT generation flow for crashlog
With earlier flow, a chunk of CBMEM region was allocated for each SRAM e.g., PUNIT SRAM, SOC PMC SRAM and IOE PMC SRAM. Then entire SRAM content was copied to dedicated CBMEM region. Later in acpi_bert.c, the BERT table was getting created for each chunk of CBMEM. This flow was not considering creating separate entries for each region of crashlog records. It resulted in only the first entry getting decoded from each SRAM. New flow aims to fix this issue. With new flow, a simple singly linked list is created to store each region of crashlog records from all SRAMs. The crashlog data is not copied to CBMEM. The nodes are allocated dynamically and then copied to ACPI BERT table and then freed. This flow also makes the overall crashlog code much simpler. BUG=b:298234592 TEST=With this change decoding crashlog show comprehensive details, tested on REX. Change-Id: I43bb61485b77d786647900ca284b7f492f412aee Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78257 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Pratikkumar Prajapati
committed by
Subrata Banik
Subrata Banik
parent
9b3c5afc00
commit
4db921317f
@ -23,10 +23,7 @@ static bool m_pmc_crashLog_support;
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static bool m_pmc_crashLog_present;
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static bool m_cpu_crashLog_support;
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static bool m_cpu_crashLog_present;
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static bool m_ioe_crashLog_support;
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static bool m_ioe_crashLog_present;
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static u32 m_pmc_crashLog_size;
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static u32 m_ioe_crashLog_size;
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static u32 m_cpu_crashLog_size;
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static u32 cpu_crash_version;
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static pmc_ipc_discovery_buf_t discovery_buf;
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@ -74,24 +71,23 @@ static void configure_sram(const struct device *sram_dev, u32 base_addr)
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pci_or_config16(sram_dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
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}
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void cl_get_pmc_sram_data(void)
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void cl_get_pmc_sram_data(cl_node_t *head)
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{
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u32 *soc_pmc_dest = NULL, *ioe_pmc_dest = NULL;
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u32 pmc_sram_base = cl_get_cpu_tmp_bar();
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u32 ioe_sram_base = get_sram_bar(PCI_DEVFN_IOE_SRAM);
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u32 pmc_crashLog_size = cl_get_pmc_record_size();
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u32 ioe_crashLog_size = 0;
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if (!pmc_sram_base) {
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printk(BIOS_ERR, "PMC SRAM base not valid\n");
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return;
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}
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cl_node_t *cl_cur = head;
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if (!pmc_crashLog_size) {
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printk(BIOS_ERR, "No PMC crashlog records\n");
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return;
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}
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if (!pmc_sram_base) {
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printk(BIOS_ERR, "PMC SRAM base not valid\n");
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return;
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}
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if (!ioe_sram_base) {
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printk(BIOS_ERR, "IOE SRAM base not valid\n");
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return;
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@ -107,23 +103,16 @@ void cl_get_pmc_sram_data(void)
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printk(BIOS_DEBUG, "PMC crashLog size : 0x%x\n", pmc_crashLog_size);
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/* allocate memory for the PMC crash records to be copied */
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unsigned long pmc_cl_cbmem_addr;
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pmc_cl_cbmem_addr = (unsigned long)cbmem_add(CBMEM_ID_PMC_CRASHLOG,
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pmc_crashLog_size);
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if (!pmc_cl_cbmem_addr) {
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printk(BIOS_ERR, "Unable to allocate CBMEM PMC crashLog entry.\n");
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return;
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/* goto tail node */
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while (cl_cur && cl_cur->next) {
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cl_cur = cl_cur->next;
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}
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memset((void *)pmc_cl_cbmem_addr, 0, pmc_crashLog_size);
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soc_pmc_dest = (u32 *)(uintptr_t)pmc_cl_cbmem_addr;
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bool pmc_sram = true;
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/* process crashlog records for SOC PMC SRAM */
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/* process crashlog records */
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for (int i = 0; i < descriptor_table.numb_regions + 1; i++) {
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u32 sram_base = 0;
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bool pmc_sram = true;
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printk(BIOS_DEBUG, "Region[0x%x].Tag=0x%x offset=0x%x, size=0x%x\n",
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i,
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descriptor_table.regions[i].bits.assign_tag,
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@ -132,6 +121,7 @@ void cl_get_pmc_sram_data(void)
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if (!descriptor_table.regions[i].bits.size)
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continue;
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/*
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* Region with metadata TAG contains information about BDF entry for SOC PMC SRAM
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* and IOE SRAM. We don't need to parse this as we already define BDFs in
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@ -144,91 +134,46 @@ void cl_get_pmc_sram_data(void)
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sizeof(u32);
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printk(BIOS_DEBUG, "Found metadata tag. PMC crashlog size adjusted to: 0x%x\n",
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pmc_crashLog_size);
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} else if (descriptor_table.regions[i].bits.assign_tag ==
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CRASHLOG_DESCRIPTOR_TABLE_TAG_SOC) {
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continue;
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} else {
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if (descriptor_table.regions[i].bits.assign_tag ==
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CRASHLOG_DESCRIPTOR_TABLE_TAG_SOC)
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sram_base = pmc_sram_base;
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else if (descriptor_table.regions[i].bits.assign_tag ==
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CRASHLOG_DESCRIPTOR_TABLE_TAG_IOE)
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sram_base = ioe_sram_base;
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else
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continue;
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if (cl_copy_data_from_sram(pmc_sram_base,
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cl_node_t *cl_node = malloc_cl_node(descriptor_table.regions[i].bits.size);
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if (!cl_node) {
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printk(BIOS_DEBUG, "failed to allocate cl_node [region = %d]\n", i);
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goto pmc_send_re_arm_after_reset;
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}
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if (cl_copy_data_from_sram(sram_base,
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descriptor_table.regions[i].bits.offset,
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descriptor_table.regions[i].bits.size,
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soc_pmc_dest,
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cl_node->data,
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i,
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pmc_sram)) {
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soc_pmc_dest = (u32 *)((u32)soc_pmc_dest +
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(descriptor_table.regions[i].bits.size
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* sizeof(u32)));
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cl_cur->next = cl_node;
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cl_cur = cl_cur->next;
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} else {
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/* coping data from sram failed */
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pmc_crashLog_size -= descriptor_table.regions[i].bits.size *
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sizeof(u32);
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sizeof(u32);
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printk(BIOS_DEBUG, "PMC crashlog size adjusted to: 0x%x\n",
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pmc_crashLog_size);
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/* free cl_node */
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free_cl_node(cl_node);
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}
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} else if (descriptor_table.regions[i].bits.assign_tag ==
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CRASHLOG_DESCRIPTOR_TABLE_TAG_IOE) {
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/*
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* SOC PMC crashlog records contains information about IOE SRAM
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* records as well. Calculate IOE records size while parsing SOC
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* PME SRAM.
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*/
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ioe_crashLog_size += descriptor_table.regions[i].bits.size * sizeof(u32);
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}
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}
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pmc_crashLog_size -= ioe_crashLog_size;
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update_new_pmc_crashlog_size(&pmc_crashLog_size);
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if (ioe_crashLog_size)
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m_ioe_crashLog_present = true;
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else
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goto pmc_send_re_arm_after_reset;
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/* allocate memory for the IOE crashlog records to be copied */
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unsigned long ioe_cl_cbmem_addr;
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ioe_cl_cbmem_addr = (unsigned long)cbmem_add(CBMEM_ID_IOE_CRASHLOG,
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ioe_crashLog_size);
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if (!ioe_cl_cbmem_addr) {
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printk(BIOS_ERR, "Unable to allocate CBMEM IOE crashLog entry.\n");
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return;
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}
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memset((void *)ioe_cl_cbmem_addr, 0, ioe_crashLog_size);
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ioe_pmc_dest = (u32 *)(uintptr_t)ioe_cl_cbmem_addr;
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/* process crashlog records for IOE SRAM */
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for (int i = 0; i < descriptor_table.numb_regions + 1; i++) {
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printk(BIOS_DEBUG, "Region[0x%x].Tag=0x%x offset=0x%x, size=0x%x\n",
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i,
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descriptor_table.regions[i].bits.assign_tag,
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descriptor_table.regions[i].bits.offset,
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descriptor_table.regions[i].bits.size);
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if (!descriptor_table.regions[i].bits.size)
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continue;
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if (descriptor_table.regions[i].bits.assign_tag ==
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CRASHLOG_DESCRIPTOR_TABLE_TAG_IOE) {
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if (cl_copy_data_from_sram(ioe_sram_base,
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descriptor_table.regions[i].bits.offset,
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descriptor_table.regions[i].bits.size,
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ioe_pmc_dest,
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i,
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pmc_sram)) {
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ioe_pmc_dest = (u32 *)((u32)ioe_pmc_dest +
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(descriptor_table.regions[i].bits.size
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* sizeof(u32)));
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} else {
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ioe_crashLog_size -= descriptor_table.regions[i].bits.size *
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sizeof(u32);
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printk(BIOS_DEBUG, "IOE crashlog size adjusted to: 0x%x\n",
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ioe_crashLog_size);
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}
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}
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}
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update_new_ioe_crashlog_size(&ioe_crashLog_size);
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pmc_send_re_arm_after_reset:
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/* when bit 7 of discov cmd resp is set -> bit 2 of size field */
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cl_pmc_re_arm_after_reset();
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@ -264,9 +209,7 @@ bool pmc_cl_discovery(void)
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(discovery_buf.conv_bits64.crash_dis_sts == 1)) {
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printk(BIOS_INFO, "PCH crashlog feature not supported.\n");
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m_pmc_crashLog_support = false;
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m_ioe_crashLog_support = false;
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m_pmc_crashLog_size = 0;
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m_ioe_crashLog_size = 0;
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printk(BIOS_DEBUG, "discovery_buf supported: %d, mechanism: %d, CrashDisSts: %d\n",
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discovery_buf.conv_bits64.supported,
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discovery_buf.conv_bits64.discov_mechanism,
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@ -464,9 +407,9 @@ void reset_discovery_buffers(void)
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int cl_get_total_data_size(void)
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{
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printk(BIOS_DEBUG, "crashlog size:pmc-0x%x, ioe-pmc-0x%x cpu-0x%x\n",
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m_pmc_crashLog_size, m_ioe_crashLog_size, m_cpu_crashLog_size);
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return m_pmc_crashLog_size + m_cpu_crashLog_size + m_ioe_crashLog_size;
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printk(BIOS_DEBUG, "crashlog size:pmc-0x%x, cpu-0x%x\n",
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m_pmc_crashLog_size, m_cpu_crashLog_size);
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return m_pmc_crashLog_size + m_cpu_crashLog_size;
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}
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static u32 get_control_status_interface(void)
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@ -566,11 +509,6 @@ int cl_get_cpu_record_size(void)
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return m_cpu_crashLog_size;
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}
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int cl_get_ioe_record_size(void)
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{
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return m_ioe_crashLog_size;
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}
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bool cl_cpu_data_present(void)
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{
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return m_cpu_crashLog_present;
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@ -581,11 +519,6 @@ bool cl_pmc_data_present(void)
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return m_pmc_crashLog_present;
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}
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bool cl_ioe_data_present(void)
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{
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return m_ioe_crashLog_present;
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}
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bool cpu_crashlog_support(void)
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{
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return m_cpu_crashLog_support;
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@ -601,11 +534,6 @@ void update_new_pmc_crashlog_size(u32 *pmc_crash_size)
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m_pmc_crashLog_size = *pmc_crash_size;
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}
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void update_new_ioe_crashlog_size(u32 *ioe_crash_size)
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{
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m_ioe_crashLog_size = *ioe_crash_size;
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}
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cpu_crashlog_discovery_table_t cl_get_cpu_discovery_table(void)
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{
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return cpu_cl_disc_tab;
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