driver/intel/fsp2.0: Add External stage cache region helper
If ramstage caching outside CBMEM is enabled i.e CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM, then a helper function to determine the caching region in SMM should be implemented. Add the same to FSP2.0 driver. FSP1.1 driver had the same implementation hence copied stage_cache.c. The SoC code should implement the smm_subregion to provide the base and size of the caching region within SMM. The fsp/memmap.h provides the prototype and we will reuse the same from FPS 1.1. Change-Id: I4412a710391dc0cee044b96403c50260c3534e6f Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/16312 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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Martin Roth
parent
3156934bf8
commit
4dfe130819
@@ -23,6 +23,7 @@ romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
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romstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c
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romstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c
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romstage-y += util.c
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romstage-y += util.c
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romstage-y += memory_init.c
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romstage-y += memory_init.c
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romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
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ramstage-y += debug.c
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ramstage-y += debug.c
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ramstage-y += graphics.c
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ramstage-y += graphics.c
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@@ -32,6 +33,7 @@ ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
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ramstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c
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ramstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c
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ramstage-y += notify.c
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ramstage-y += notify.c
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ramstage-y += silicon_init.c
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ramstage-y += silicon_init.c
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ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
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ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
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ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
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ramstage-y += util.c
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ramstage-y += util.c
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47
src/drivers/intel/fsp2_0/include/fsp/memmap.h
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47
src/drivers/intel/fsp2_0/include/fsp/memmap.h
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@@ -0,0 +1,47 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015-2016 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _COMMON_MEMMAP_H_
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#define _COMMON_MEMMAP_H_
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#include <types.h>
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/*
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* mmap_region_granularity must to return a size which is a positive non-zero
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* integer multiple of the SMM size when SMM is in use. When not using SMM,
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* this value should be set to 8 MiB.
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*/
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size_t mmap_region_granularity(void);
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/* Fills in the arguments for the entire SMM region covered by chipset
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* protections. e.g. TSEG. */
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void smm_region(void **start, size_t *size);
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enum {
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/* SMM handler area. */
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SMM_SUBREGION_HANDLER,
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/* SMM cache region. */
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SMM_SUBREGION_CACHE,
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/* Chipset specific area. */
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SMM_SUBREGION_CHIPSET,
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/* Total sub regions supported. */
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SMM_SUBREGION_NUM,
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};
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/* Fills in the start and size for the requested SMM subregion. Returns
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* 0 on susccess, < 0 on failure. */
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int smm_subregion(int sub, void **start, size_t *size);
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#endif /* _COMMON_MEMMAP_H_ */
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28
src/drivers/intel/fsp2_0/stage_cache.c
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28
src/drivers/intel/fsp2_0/stage_cache.c
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@@ -0,0 +1,28 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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* Copyright (C) 2015 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <fsp/memmap.h>
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#include <stage_cache.h>
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void stage_cache_external_region(void **base, size_t *size)
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{
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if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
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printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
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*base = NULL;
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*size = 0;
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}
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}
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