src: Fix MSR_PKG_CST_CONFIG_CONTROL register name

Change-Id: I492224b6900b9658d54c8cf486ef5d64b299687f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
This commit is contained in:
Elyes HAOUAS
2018-10-02 08:44:47 +02:00
committed by Martin Roth
parent 19c0ae540e
commit 4e6b7907de
25 changed files with 38 additions and 38 deletions

View File

@@ -47,7 +47,7 @@
static const struct reg_script core_msr_script[] = {
#if !IS_ENABLED(CONFIG_SOC_INTEL_GLK)
/* Enable C-state and IO/MWAIT redirect */
REG_MSR_WRITE(MSR_PMG_CST_CONFIG_CONTROL,
REG_MSR_WRITE(MSR_PKG_CST_CONFIG_CONTROL,
(PKG_C_STATE_LIMIT_C2_MASK | CORE_C_STATE_LIMIT_C10_MASK
| IO_MWAIT_REDIRECT_MASK | CST_CFG_LOCK_MASK)),
/* Power Management I/O base address for I/O trapping to C-states */