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Rename ECAM-specific MMCONF Kconfigs

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Currently, the MMCONF Kconfigs only support the Enhanced Configuration
Access mechanism (ECAM) method for accessing the PCI config address
space.  Some platforms have a different way of mapping the PCI config
space to memory.  This patch renames the following configs to
make it clear that these configs are ECAM-specific:

- NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT
- MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT
- MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS
- MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER
- MMCONF_LENGTH --> ECAM_MMCONF_LENGTH

Please refer to CB:57861 "Proposed coreboot Changes" for more
details.

BUG=b:181098581
BRANCH=None
TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max
     Make sure Jenkins verifies that builds on other boards

Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Shelley Chen
2021-10-20 15:43:45 -07:00
parent 5c163bb869
commit 4e9bb3308e
104 changed files with 205 additions and 194 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h
View File

@ -1088,9 +1088,9 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#define CFG_PCI_MMIO_BASE (CONFIG_MMCONF_BASE_ADDRESS)
#define CFG_PCI_MMIO_BASE (CONFIG_ECAM_MMCONF_BASE_ADDRESS)
#define CFG_PCI_MMIO_SIZE (CONFIG_MMCONF_BUS_NUMBER)
#define CFG_PCI_MMIO_SIZE (CONFIG_ECAM_MMCONF_BUS_NUMBER)
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)

4
src/vendorcode/amd/agesa/f15tn/Config/PlatformInstall.h
View File

@ -2444,9 +2444,9 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#define CFG_PCI_MMIO_BASE (CONFIG_MMCONF_BASE_ADDRESS)
#define CFG_PCI_MMIO_BASE (CONFIG_ECAM_MMCONF_BASE_ADDRESS)
#define CFG_PCI_MMIO_SIZE (CONFIG_MMCONF_BUS_NUMBER)
#define CFG_PCI_MMIO_SIZE (CONFIG_ECAM_MMCONF_BUS_NUMBER)
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)

4
src/vendorcode/amd/agesa/f16kb/Config/PlatformInstall.h
View File

@ -1451,9 +1451,9 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_LHTC_TEMPERATURE_LIMIT (0)
#endif
#define CFG_PCI_MMIO_BASE (CONFIG_MMCONF_BASE_ADDRESS)
#define CFG_PCI_MMIO_BASE (CONFIG_ECAM_MMCONF_BASE_ADDRESS)
#define CFG_PCI_MMIO_SIZE (CONFIG_MMCONF_BUS_NUMBER)
#define CFG_PCI_MMIO_SIZE (CONFIG_ECAM_MMCONF_BUS_NUMBER)
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)

2
src/vendorcode/amd/cimx/sb800/OEM.h
View File

@ -52,7 +52,7 @@
#ifdef MOVE_PCIEBAR_TO_F0000000
#define PCIEX_BASE_ADDRESS 0xF7000000
#else
#define PCIEX_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#define PCIEX_BASE_ADDRESS CONFIG_ECAM_MMCONF_BASE_ADDRESS
#endif
/**