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Make d945gclf build.

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Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2009-10-28 18:51:47 +00:00
parent 2d2f0c121f
commit 4ec4fbe0e9
8 changed files with 26 additions and 8 deletions
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1
src/cpu/intel/Makefile.inc
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@ -3,6 +3,7 @@
# #
# Therefore: ONLY include Makefile.inc from socket directories! # Therefore: ONLY include Makefile.inc from socket directories!
subdirs-$(CONFIG_CPU_INTEL_SOCKET_411) += socket_411
subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += bga956 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += bga956
subdirs-$(CONFIG_CPU_INTEL_EP80579) += ep80579 subdirs-$(CONFIG_CPU_INTEL_EP80579) += ep80579
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478

2
src/cpu/intel/model_106cx/Config.lb
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@ -22,8 +22,6 @@ default CONFIG_HAVE_MOVNTI=1
dir /cpu/x86/tsc dir /cpu/x86/tsc
dir /cpu/x86/mtrr dir /cpu/x86/mtrr
dir /cpu/x86/fpu
dir /cpu/x86/sse
dir /cpu/x86/lapic dir /cpu/x86/lapic
dir /cpu/x86/cache dir /cpu/x86/cache
dir /cpu/x86/smm dir /cpu/x86/smm

13
src/mainboard/intel/d945gclf/Kconfig
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@ -21,18 +21,18 @@ config BOARD_INTEL_D945GCLF
bool "D945GCLF" bool "D945GCLF"
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_411
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627THG select SUPERIO_SMSC_LPC47M15X
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE select HAVE_MP_TABLE
select MMCONF_SUPPORT select MMCONF_SUPPORT
select USE_PRINTK_IN_CAR select USE_PRINTK_IN_CAR
select AP_IN_SIPI_WAIT select AP_IN_SIPI_WAIT
select UDELAY_LAPIC select UDELAY_LAPIC
select HAVE_ACPI_TABLES #select HAVE_ACPI_TABLES
select HAVE_SMI_HANDLER #select HAVE_SMI_HANDLER
select BOARD_ROMSIZE_KB_1024 select BOARD_ROMSIZE_KB_1024
config MAINBOARD_DIR config MAINBOARD_DIR
@ -79,3 +79,8 @@ config MAX_PHYSICAL_CPUS
int int
default 2 default 2
depends on BOARD_INTEL_D945GCLF depends on BOARD_INTEL_D945GCLF
config HAVE_INIT_TIMER
bool
default n
depends on BOARD_INTEL_D945GCLF

2
src/superio/smsc/Kconfig
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@ -6,6 +6,8 @@ config SUPERIO_SMSC_LPC47B397
bool bool
config SUPERIO_SMSC_LPC47M10X config SUPERIO_SMSC_LPC47M10X
bool bool
config SUPERIO_SMSC_LPC47M15X
bool
config SUPERIO_SMSC_LPC47N217 config SUPERIO_SMSC_LPC47N217
bool bool
config SUPERIO_SMSC_SMSCSUPERIO config SUPERIO_SMSC_SMSCSUPERIO

1
src/superio/smsc/Makefile.inc
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@ -2,5 +2,6 @@ subdirs-y += fdc37m60x
subdirs-y += lpc47b272 subdirs-y += lpc47b272
subdirs-y += lpc47b397 subdirs-y += lpc47b397
subdirs-y += lpc47m10x subdirs-y += lpc47m10x
subdirs-y += lpc47m15x
subdirs-y += lpc47n217 subdirs-y += lpc47n217
subdirs-y += smscsuperio subdirs-y += smscsuperio

2
src/superio/smsc/lpc47m15x/Makefile.inc Normal file
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@ -0,0 +1,2 @@
#config chip.h
obj-$(CONFIG_SUPERIO_SMSC_LPC47M15X) += superio.o

3
src/superio/smsc/lpc47m15x/superio.c
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@ -35,7 +35,6 @@
// Forward declarations // Forward declarations
static void enable_dev(device_t dev); static void enable_dev(device_t dev);
void lpc47m15x_pnp_set_resources(device_t dev); void lpc47m15x_pnp_set_resources(device_t dev);
void lpc47m15x_pnp_set_resources(device_t dev);
void lpc47m15x_pnp_enable_resources(device_t dev); void lpc47m15x_pnp_enable_resources(device_t dev);
void lpc47m15x_pnp_enable(device_t dev); void lpc47m15x_pnp_enable(device_t dev);
static void lpc47m15x_init(device_t dev); static void lpc47m15x_init(device_t dev);
@ -121,7 +120,7 @@ static void lpc47m15x_init(device_t dev)
case LPC47M15X_KBC: case LPC47M15X_KBC:
res0 = find_resource(dev, PNP_IDX_IO0); res0 = find_resource(dev, PNP_IDX_IO0);
res1 = find_resource(dev, PNP_IDX_IO1); res1 = find_resource(dev, PNP_IDX_IO1);
pc_keyboard_init(&conf->keyboard); init_pc_keyboard(0x60, 0x64, &conf->keyboard);
break; break;
} }
} }

10
targets/intel/d945gclf/Config.lb Normal file
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@ -0,0 +1,10 @@
target d945gclf
mainboard intel/d945gclf
romimage "fallback"
option CONFIG_USE_FALLBACK_IMAGE = 1
payload ../payload.elf
end
buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback"