soc/intel/alderlake: Reduce memory test size

Enable upd to reduce size of the memory test.

BUG=b:268546941
TEST=Observe boot time improvement with these two UPDs set

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I95c7d8503596c2712d7abe123ed1f911ac4abacf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74719
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>

src/soc/intel/alderlake/chipset.cb

@@ -90,6 +90,9 @@ chip soc/intel/alderlake
 		.tdp_pl4 = 114,
 	}"
 
+	# Reduce the size of BasicMemoryTests to speed up the boot time.
+	register "lower_basic_mem_test_size" = "true"
+
 	# NOTE: if any variant wants to override this value, use the same format
 	# as register "common_soc_config.pch_thermal_trip" = "value", instead of
 	# putting it under register "common_soc_config" in overridetree.cb file.