sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE

Browse Source 
If stage cache is enabled, we should not allow S3 resume
to load firmware from non-volatile memory.

This also adds board reset for failing to load postcar
from stage cache.

Change-Id: Ib6cc7ad0fe9dcdf05b814d324b680968a2870f23
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37682
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2019-12-18 19:40:48 +02:00
parent 6766f4fd04
commit 4f14cd8a39
11 changed files with 15 additions and 65 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
src/lib/prog_loaders.c
View File

@ -83,14 +83,6 @@ fail:
int __weak prog_locate_hook(struct prog *prog) { return 0; }
static void ramstage_cache_invalid(void)
{
printk(BIOS_ERR, "ramstage cache invalid.\n");
if (CONFIG(RESET_ON_INVALID_RAMSTAGE_CACHE)) {
board_reset();
}
}
static void run_ramstage_from_resume(struct prog *ramstage)
{
if (!romstage_handoff_is_resume())
@ -105,7 +97,9 @@ static void run_ramstage_from_resume(struct prog *ramstage)
printk(BIOS_DEBUG, "Jumping to image.\n");
prog_run(ramstage);
}
ramstage_cache_invalid();
printk(BIOS_ERR, "ramstage cache invalid.\n");
board_reset();
}
static int load_relocatable_ramstage(struct prog *ramstage)