From 4f732420526fdc1c969e910daca573dca72d7b82 Mon Sep 17 00:00:00 2001 From: Jon Murphy Date: Fri, 5 Aug 2022 15:43:44 -0600 Subject: [PATCH] treewide: Rename Sabrina to Mendocino 'Mendocino' was an embargoed name and could previously not be used in references to Skyrim. coreboot has references to sabrina both in directory structure and in files. This will make life difficult for people looking for Mendocino support in the long term. The code name should be replaced with "mendocino". BUG=b:239072117 TEST=Builds Cq-Depend: chromium:3764023 Cq-Depend: chromium:3763392 Cq-Depend: chrome-internal:4876777 Signed-off-by: Jon Murphy Change-Id: I2d0f76fde07a209a79f7e1596cc8064e53f06ada Reviewed-on: https://review.coreboot.org/c/coreboot/+/65861 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- MAINTAINERS | 6 ++--- src/mainboard/amd/chausie/Kconfig | 4 +-- src/mainboard/amd/chausie/devicetree.cb | 2 +- src/mainboard/google/skyrim/Kconfig | 2 +- .../skyrim/variants/baseboard/devicetree.cb | 4 +-- .../skyrim/variants/skyrim/overridetree.cb | 4 +-- src/soc/amd/common/block/acp/Kconfig | 2 +- .../common/block/include/amdblocks/psp_efs.h | 2 +- src/soc/amd/common/block/lpc/espi_def.h | 2 +- src/soc/amd/{sabrina => mendocino}/Kconfig | 12 ++++----- .../amd/{sabrina => mendocino}/Makefile.inc | 26 +++++++++---------- src/soc/amd/{sabrina => mendocino}/acpi.c | 2 +- .../{sabrina => mendocino}/acpi/globalnvs.asl | 2 +- .../amd/{sabrina => mendocino}/acpi/mmio.asl | 0 .../amd/{sabrina => mendocino}/acpi/pci0.asl | 0 .../acpi/pci_int_defs.asl | 0 .../acpi/rtc_workaround.asl | 0 .../amd/{sabrina => mendocino}/acpi/soc.asl | 0 .../amd/{sabrina => mendocino}/agesa_acpi.c | 0 src/soc/amd/{sabrina => mendocino}/aoac.c | 0 .../amd/{sabrina => mendocino}/bootblock.c | 0 src/soc/amd/{sabrina => mendocino}/chip.c | 8 +++--- src/soc/amd/{sabrina => mendocino}/chip.h | 10 +++---- .../chipset_mendocino.cb} | 2 +- .../chipset_rembrandt.cb | 0 src/soc/amd/{sabrina => mendocino}/config.c | 2 +- src/soc/amd/{sabrina => mendocino}/cpu.c | 2 +- .../amd/{sabrina => mendocino}/data_fabric.c | 0 .../amd/{sabrina => mendocino}/early_fch.c | 2 +- .../amd/{sabrina => mendocino}/espi_util.c | 0 src/soc/amd/{sabrina => mendocino}/fch.c | 2 +- .../amd/{sabrina => mendocino}/fsp_m_params.c | 4 +-- .../amd/{sabrina => mendocino}/fsp_s_params.c | 0 src/soc/amd/{sabrina => mendocino}/fw.cfg | 0 src/soc/amd/{sabrina => mendocino}/gpio.c | 0 src/soc/amd/{sabrina => mendocino}/i2c.c | 4 +-- .../{sabrina => mendocino}/include/soc/acpi.h | 6 ++--- .../include/soc/amd_pci_int_defs.h | 6 ++--- .../include/soc/aoac_defs.h | 6 ++--- src/soc/amd/mendocino/include/soc/cpu.h | 8 ++++++ .../include/soc/data_fabric.h | 6 ++--- src/soc/amd/mendocino/include/soc/espi.h | 8 ++++++ .../{sabrina => mendocino}/include/soc/gpio.h | 6 ++--- .../{sabrina => mendocino}/include/soc/i2c.h | 6 ++--- .../include/soc/iomap.h | 6 ++--- .../{sabrina => mendocino}/include/soc/lpc.h | 6 ++--- .../{sabrina => mendocino}/include/soc/msr.h | 6 ++--- .../{sabrina => mendocino}/include/soc/nvs.h | 8 +++--- .../include/soc/pci_devs.h | 6 ++--- .../include/soc/platform_descriptors.h | 6 ++--- .../include/soc/psp_transfer.h | 6 ++--- .../include/soc/psp_verstage_addr.h | 6 ++--- .../{sabrina => mendocino}/include/soc/smi.h | 6 ++--- .../{sabrina => mendocino}/include/soc/smu.h | 6 ++--- .../include/soc/southbridge.h | 6 ++--- .../{sabrina => mendocino}/include/soc/uart.h | 6 ++--- src/soc/amd/{sabrina => mendocino}/mca.c | 0 src/soc/amd/{sabrina => mendocino}/preload.c | 0 .../amd/mendocino/psp_verstage/Makefile.inc | 17 ++++++++++++ .../psp_verstage/chipset.c | 0 .../{sabrina => mendocino}/psp_verstage/svc.c | 0 .../{sabrina => mendocino}/psp_verstage/svc.h | 0 .../psp_verstage/uart.c | 0 src/soc/amd/{sabrina => mendocino}/reset.c | 0 src/soc/amd/{sabrina => mendocino}/romstage.c | 0 .../amd/{sabrina => mendocino}/root_complex.c | 2 +- .../amd/{sabrina => mendocino}/smihandler.c | 0 src/soc/amd/{sabrina => mendocino}/smu.c | 0 src/soc/amd/{sabrina => mendocino}/uart.c | 2 +- src/soc/amd/{sabrina => mendocino}/xhci.c | 0 src/soc/amd/sabrina/include/soc/cpu.h | 8 ------ src/soc/amd/sabrina/include/soc/espi.h | 8 ------ src/soc/amd/sabrina/psp_verstage/Makefile.inc | 17 ------------ .../amd/fsp/{sabrina => mendocino}/FspGuids.h | 0 .../amd/fsp/{sabrina => mendocino}/FspUpd.h | 0 .../amd/fsp/{sabrina => mendocino}/FspUsb.h | 0 .../amd/fsp/{sabrina => mendocino}/FspmUpd.h | 0 .../amd/fsp/{sabrina => mendocino}/FspsUpd.h | 0 .../bl_uapp/bl_uapp_end.S | 0 .../bl_uapp/bl_uapp_header.inc | 0 .../bl_uapp/bl_uapp_startup.S | 0 .../amd/fsp/{sabrina => mendocino}/dmi_info.h | 0 .../fsp/{sabrina => mendocino}/fsp_h_c99.h | 0 .../include/bl_uapp/bl_errorcodes_public.h | 0 .../include/bl_uapp/bl_syscall_public.h | 0 .../platform_descriptors.h | 4 +-- 86 files changed, 145 insertions(+), 145 deletions(-) rename src/soc/amd/{sabrina => mendocino}/Kconfig (98%) rename src/soc/amd/{sabrina => mendocino}/Makefile.inc (93%) rename src/soc/amd/{sabrina => mendocino}/acpi.c (99%) rename src/soc/amd/{sabrina => mendocino}/acpi/globalnvs.asl (93%) rename src/soc/amd/{sabrina => mendocino}/acpi/mmio.asl (100%) rename src/soc/amd/{sabrina => mendocino}/acpi/pci0.asl (100%) rename src/soc/amd/{sabrina => mendocino}/acpi/pci_int_defs.asl (100%) rename src/soc/amd/{sabrina => mendocino}/acpi/rtc_workaround.asl (100%) rename src/soc/amd/{sabrina => mendocino}/acpi/soc.asl (100%) rename src/soc/amd/{sabrina => mendocino}/agesa_acpi.c (100%) rename src/soc/amd/{sabrina => mendocino}/aoac.c (100%) rename src/soc/amd/{sabrina => mendocino}/bootblock.c (100%) rename src/soc/amd/{sabrina => mendocino}/chip.c (92%) rename src/soc/amd/{sabrina => mendocino}/chip.h (94%) rename src/soc/amd/{sabrina/chipset_sabrina.cb => mendocino/chipset_mendocino.cb} (99%) rename src/soc/amd/{sabrina => mendocino}/chipset_rembrandt.cb (100%) rename src/soc/amd/{sabrina => mendocino}/config.c (84%) rename src/soc/amd/{sabrina => mendocino}/cpu.c (98%) rename src/soc/amd/{sabrina => mendocino}/data_fabric.c (100%) rename src/soc/amd/{sabrina => mendocino}/early_fch.c (97%) rename src/soc/amd/{sabrina => mendocino}/espi_util.c (100%) rename src/soc/amd/{sabrina => mendocino}/fch.c (98%) rename src/soc/amd/{sabrina => mendocino}/fsp_m_params.c (97%) rename src/soc/amd/{sabrina => mendocino}/fsp_s_params.c (100%) rename src/soc/amd/{sabrina => mendocino}/fw.cfg (100%) rename src/soc/amd/{sabrina => mendocino}/gpio.c (100%) rename src/soc/amd/{sabrina => mendocino}/i2c.c (90%) rename src/soc/amd/{sabrina => mendocino}/include/soc/acpi.h (82%) rename src/soc/amd/{sabrina => mendocino}/include/soc/amd_pci_int_defs.h (94%) rename src/soc/amd/{sabrina => mendocino}/include/soc/aoac_defs.h (84%) create mode 100644 src/soc/amd/mendocino/include/soc/cpu.h rename src/soc/amd/{sabrina => mendocino}/include/soc/data_fabric.h (67%) create mode 100644 src/soc/amd/mendocino/include/soc/espi.h rename src/soc/amd/{sabrina => mendocino}/include/soc/gpio.h (99%) rename src/soc/amd/{sabrina => mendocino}/include/soc/i2c.h (88%) rename src/soc/amd/{sabrina => mendocino}/include/soc/iomap.h (94%) rename src/soc/amd/{sabrina => mendocino}/include/soc/lpc.h (89%) rename src/soc/amd/{sabrina => mendocino}/include/soc/msr.h (93%) rename src/soc/amd/{sabrina => mendocino}/include/soc/nvs.h (83%) rename src/soc/amd/{sabrina => mendocino}/include/soc/pci_devs.h (97%) rename src/soc/amd/{sabrina => mendocino}/include/soc/platform_descriptors.h (75%) rename src/soc/amd/{sabrina => mendocino}/include/soc/psp_transfer.h (94%) rename src/soc/amd/{sabrina => mendocino}/include/soc/psp_verstage_addr.h (80%) rename src/soc/amd/{sabrina => mendocino}/include/soc/smi.h (98%) rename src/soc/amd/{sabrina => mendocino}/include/soc/smu.h (84%) rename src/soc/amd/{sabrina => mendocino}/include/soc/southbridge.h (97%) rename src/soc/amd/{sabrina => mendocino}/include/soc/uart.h (72%) rename src/soc/amd/{sabrina => mendocino}/mca.c (100%) rename src/soc/amd/{sabrina => mendocino}/preload.c (100%) create mode 100644 src/soc/amd/mendocino/psp_verstage/Makefile.inc rename src/soc/amd/{sabrina => mendocino}/psp_verstage/chipset.c (100%) rename src/soc/amd/{sabrina => mendocino}/psp_verstage/svc.c (100%) rename src/soc/amd/{sabrina => mendocino}/psp_verstage/svc.h (100%) rename src/soc/amd/{sabrina => mendocino}/psp_verstage/uart.c (100%) rename src/soc/amd/{sabrina => mendocino}/reset.c (100%) rename src/soc/amd/{sabrina => mendocino}/romstage.c (100%) rename src/soc/amd/{sabrina => mendocino}/root_complex.c (99%) rename src/soc/amd/{sabrina => mendocino}/smihandler.c (100%) rename src/soc/amd/{sabrina => mendocino}/smu.c (100%) rename src/soc/amd/{sabrina => mendocino}/uart.c (98%) rename src/soc/amd/{sabrina => mendocino}/xhci.c (100%) delete mode 100644 src/soc/amd/sabrina/include/soc/cpu.h delete mode 100644 src/soc/amd/sabrina/include/soc/espi.h delete mode 100644 src/soc/amd/sabrina/psp_verstage/Makefile.inc rename src/vendorcode/amd/fsp/{sabrina => mendocino}/FspGuids.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/FspUpd.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/FspUsb.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/FspmUpd.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/FspsUpd.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/bl_uapp/bl_uapp_end.S (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/bl_uapp/bl_uapp_header.inc (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/bl_uapp/bl_uapp_startup.S (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/dmi_info.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/fsp_h_c99.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/include/bl_uapp/bl_errorcodes_public.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/include/bl_uapp/bl_syscall_public.h (100%) rename src/vendorcode/amd/fsp/{sabrina => mendocino}/platform_descriptors.h (97%) diff --git a/MAINTAINERS b/MAINTAINERS index f595876cec..b7838fef5c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -656,7 +656,7 @@ S: Maintained F: src/soc/amd/picasso/ F: src/vendorcode/amd/fsp/picasso/ -AMD Sabrina +AMD Mendocino M: Marshall Dawson M: Felix Held M: Jason Glenesk @@ -664,8 +664,8 @@ M: Raul E Rangel M: Fred Reitberger M: Matt DeVillier S: Maintained -F: src/soc/amd/sabrina/ -F: src/vendorcode/amd/fsp/sabrina/ +F: src/soc/amd/mendocino/ +F: src/vendorcode/amd/fsp/mendocino/ AMD Stoneyridge M: Marshall Dawson diff --git a/src/mainboard/amd/chausie/Kconfig b/src/mainboard/amd/chausie/Kconfig index 477620ca47..e9fd743fbb 100644 --- a/src/mainboard/amd/chausie/Kconfig +++ b/src/mainboard/amd/chausie/Kconfig @@ -6,7 +6,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 select EC_ACPI - select SOC_AMD_SABRINA + select SOC_AMD_MENDOCINO select SOC_AMD_COMMON_BLOCK_USE_ESPI select AMD_SOC_CONSOLE_UART select MAINBOARD_HAS_CHROMEOS @@ -74,7 +74,7 @@ config RO_REGION_ONLY string depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A # Add the EFS and EC to the RO region only - # This is a chausie-specific override of soc/amd/sabrina/Kconfig + # This is a chausie-specific override of soc/amd/mendocino/Kconfig default "apu/amdfw apu/ecfw" config CHROMEOS diff --git a/src/mainboard/amd/chausie/devicetree.cb b/src/mainboard/amd/chausie/devicetree.cb index c0806a5c07..5cfd42f0f1 100644 --- a/src/mainboard/amd/chausie/devicetree.cb +++ b/src/mainboard/amd/chausie/devicetree.cb @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -chip soc/amd/sabrina +chip soc/amd/mendocino register "common_config.espi_config" = "{ .std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X2E_0X2F_EN | ESPI_DECODE_IO_0X60_0X64_EN, .generic_io_range[0] = { diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index f00775824f..e96940df03 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -36,7 +36,7 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_TPM2 select PSP_DISABLE_POSTCODES # TODO re-enable PSP postcodes later (b/227199049) - select SOC_AMD_SABRINA + select SOC_AMD_MENDOCINO select SOC_AMD_COMMON_BLOCK_USE_ESPI select TPM_GOOGLE_TI50 diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb index 71f1a5f510..9d4b12ceb0 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-or-later -chip soc/amd/sabrina +chip soc/amd/mendocino # eSPI Configuration register "common_config.espi_config" = "{ @@ -213,4 +213,4 @@ chip soc/amd/sabrina device generic 3 on end end -end # chip soc/amd/sabrina +end # chip soc/amd/mendocino diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb index 89cc63cb0f..d8dc59bd45 100644 --- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb @@ -26,7 +26,7 @@ fw_config end end -chip soc/amd/sabrina +chip soc/amd/mendocino device domain 0 on device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref xhci_1 on # XHCI1 controller @@ -241,4 +241,4 @@ chip soc/amd/sabrina end end # UART1 -end # chip soc/amd/sabrina +end # chip soc/amd/mendocino diff --git a/src/soc/amd/common/block/acp/Kconfig b/src/soc/amd/common/block/acp/Kconfig index df17f71057..e776416cf4 100644 --- a/src/soc/amd/common/block/acp/Kconfig +++ b/src/soc/amd/common/block/acp/Kconfig @@ -8,4 +8,4 @@ config SOC_AMD_COMMON_BLOCK_ACP_GEN2 bool help Select this option to perform Audio Co-Processor(ACP) configuration. - Used by the ACP in AMD sabrina (family 17h) and possibly newer CPUs. + Used by the ACP in AMD mendocino (family 17h) and possibly newer CPUs. diff --git a/src/soc/amd/common/block/include/amdblocks/psp_efs.h b/src/soc/amd/common/block/include/amdblocks/psp_efs.h index af44765519..1f93807538 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp_efs.h +++ b/src/soc/amd/common/block/include/amdblocks/psp_efs.h @@ -16,7 +16,7 @@ #elif CONFIG(SOC_AMD_PICASSO) #define SPI_MODE_FIELD spi_readmode_f17_mod_00_2f #define SPI_SPEED_FIELD spi_fastspeed_f17_mod_00_2f -#elif CONFIG(SOC_AMD_CEZANNE) | CONFIG(SOC_AMD_SABRINA) +#elif CONFIG(SOC_AMD_CEZANNE) | CONFIG(SOC_AMD_MENDOCINO) #define SPI_MODE_FIELD spi_readmode_f17_mod_30_3f #define SPI_SPEED_FIELD spi_fastspeed_f17_mod_30_3f #else diff --git a/src/soc/amd/common/block/lpc/espi_def.h b/src/soc/amd/common/block/lpc/espi_def.h index dc398a9fc2..1dacffcf51 100644 --- a/src/soc/amd/common/block/lpc/espi_def.h +++ b/src/soc/amd/common/block/lpc/espi_def.h @@ -25,7 +25,7 @@ #define ESPI_WDG_EN (1 << 0) #define ESPI_GLOBAL_CONTROL_1 0x34 -#define ESPI_ALERT_ENABLE (1 << 20) /* Sabrina and later SoCs */ +#define ESPI_ALERT_ENABLE (1 << 20) /* Mendocino and later SoCs */ #define ESPI_RGCMD_INT_MAP_SHIFT 13 #define ESPI_RGCMD_INT_MAP_MASK (0x1f << ESPI_RGCMD_INT_MAP_SHIFT) #define ESPI_RGCMD_INT(irq) ((irq) << ESPI_RGCMD_INT_MAP_SHIFT) diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/mendocino/Kconfig similarity index 98% rename from src/soc/amd/sabrina/Kconfig rename to src/soc/amd/mendocino/Kconfig index 14ae5b09e9..930861b2ab 100644 --- a/src/soc/amd/sabrina/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -5,11 +5,11 @@ config SOC_AMD_REMBRANDT_BASE bool -config SOC_AMD_SABRINA +config SOC_AMD_MENDOCINO bool select SOC_AMD_REMBRANDT_BASE help - AMD Sabrina support + AMD Mendocino support config SOC_AMD_REMBRANDT bool @@ -99,8 +99,8 @@ config ARCH_ALL_STAGES_X86 config CHIPSET_DEVICETREE string - default "soc/amd/sabrina/chipset_sabrina.cb" if SOC_AMD_SABRINA - default "soc/amd/sabrina/chipset_rembrandt.cb" + default "soc/amd/mendocino/chipset_mendocino.cb" if SOC_AMD_MENDOCINO + default "soc/amd/mendocino/chipset_rembrandt.cb" config EARLY_RESERVED_DRAM_BASE hex @@ -247,7 +247,7 @@ config ECAM_MMCONF_BUS_NUMBER config MAX_CPUS int - default 8 if SOC_AMD_SABRINA + default 8 if SOC_AMD_MENDOCINO default 16 help Maximum number of threads the platform can have. @@ -355,7 +355,7 @@ comment "AMD Firmware Directory Table set to location for 16MB ROM" config AMDFW_CONFIG_FILE string "AMD PSP Firmware config file" - default "src/soc/amd/sabrina/fw.cfg" + default "src/soc/amd/mendocino/fw.cfg" help Specify the path/location of AMD PSP Firmware config file. diff --git a/src/soc/amd/sabrina/Makefile.inc b/src/soc/amd/mendocino/Makefile.inc similarity index 93% rename from src/soc/amd/sabrina/Makefile.inc rename to src/soc/amd/mendocino/Makefile.inc index 19e756a37a..3d97e217bb 100644 --- a/src/soc/amd/sabrina/Makefile.inc +++ b/src/soc/amd/mendocino/Makefile.inc @@ -2,7 +2,7 @@ # TODO: Check if this is still correct -ifeq ($(CONFIG_SOC_AMD_SABRINA),y) +ifeq ($(CONFIG_SOC_AMD_MENDOCINO),y) subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage @@ -52,9 +52,9 @@ smm-y += smihandler.c smm-y += smu.c smm-$(CONFIG_DEBUG_SMI) += uart.c -CPPFLAGS_common += -I$(src)/soc/amd/sabrina/include -CPPFLAGS_common += -I$(src)/soc/amd/sabrina/acpi -CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/sabrina +CPPFLAGS_common += -I$(src)/soc/amd/mendocino/include +CPPFLAGS_common += -I$(src)/soc/amd/mendocino/acpi +CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/mendocino MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR) @@ -69,7 +69,7 @@ MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR) $(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\ $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size)) -SABRINA_FWM_POSITION=$(call int-add, \ +MENDOCINO_FWM_POSITION=$(call int-add, \ $(call int-subtract, 0xffffffff \ $(call int-shift-left, \ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) @@ -78,11 +78,11 @@ SABRINA_FWM_POSITION=$(call int-add, \ # Building the cbfs image will fail if the offset isn't large enough AMD_FW_AB_POSITION := 0x40 -SABRINA_FW_A_POSITION=$(call int-add, \ +MENDOCINO_FW_A_POSITION=$(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_A_START" {print $$3}' $(obj)/fmap_config.h) \ $(AMD_FW_AB_POSITION)) -SABRINA_FW_B_POSITION=$(call int-add, \ +MENDOCINO_FW_B_POSITION=$(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_B_START" {print $$3}' $(obj)/fmap_config.h) \ $(AMD_FW_AB_POSITION)) # @@ -222,7 +222,7 @@ AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_EFS_SPI_SPEED) \ $(OPT_EFS_SPI_MICRON_FLAG) \ --config $(CONFIG_AMDFW_CONFIG_FILE) \ - --soc-name "Sabrina" \ + --soc-name "Mendocino" \ --flashsize $(CONFIG_ROM_SIZE) \ $(OPT_RECOVERY_AB_SINGLE_COPY) @@ -243,7 +243,7 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ $(OPT_APOB_NV_BASE) \ $(OPT_VERSTAGE_FILE) \ $(OPT_VERSTAGE_SIG_FILE) \ - --location $(shell printf "%#x" $(SABRINA_FWM_POSITION)) \ + --location $(shell printf "%#x" $(MENDOCINO_FWM_POSITION)) \ --output $@ $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) @@ -259,7 +259,7 @@ $(obj)/amdfw_a.rom: $(obj)/amdfw.rom $(AMDFW_COMMON_ARGS) \ $(OPT_APOB_NV_SIZE) \ $(OPT_APOB_NV_BASE) \ - --location $(shell printf "%#x" $(SABRINA_FW_A_POSITION)) \ + --location $(shell printf "%#x" $(MENDOCINO_FW_A_POSITION)) \ --anywhere \ --output $@ @@ -270,14 +270,14 @@ $(obj)/amdfw_b.rom: $(obj)/amdfw.rom $(AMDFW_COMMON_ARGS) \ $(OPT_APOB_NV_SIZE) \ $(OPT_APOB_NV_BASE) \ - --location $(shell printf "%#x" $(SABRINA_FW_B_POSITION)) \ + --location $(shell printf "%#x" $(MENDOCINO_FW_B_POSITION)) \ --anywhere \ --output $@ cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom -apu/amdfw-position := $(SABRINA_FWM_POSITION) +apu/amdfw-position := $(MENDOCINO_FWM_POSITION) apu/amdfw-type := raw ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) @@ -294,4 +294,4 @@ endif amd_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/*UcodePatch_*.bin) -endif # ($(CONFIG_SOC_AMD_SABRINA),y) +endif # ($(CONFIG_SOC_AMD_MENDOCINO),y) diff --git a/src/soc/amd/sabrina/acpi.c b/src/soc/amd/mendocino/acpi.c similarity index 99% rename from src/soc/amd/sabrina/acpi.c rename to src/soc/amd/mendocino/acpi.c index 32bbde5364..334063aa5b 100644 --- a/src/soc/amd/sabrina/acpi.c +++ b/src/soc/amd/mendocino/acpi.c @@ -58,7 +58,7 @@ unsigned long acpi_fill_madt(unsigned long current) */ void acpi_fill_fadt(acpi_fadt_t *fadt) { - const struct soc_amd_sabrina_config *cfg = config_of_soc(); + const struct soc_amd_mendocino_config *cfg = config_of_soc(); printk(BIOS_DEBUG, "pm_base: 0x%04x\n", ACPI_IO_BASE); diff --git a/src/soc/amd/sabrina/acpi/globalnvs.asl b/src/soc/amd/mendocino/acpi/globalnvs.asl similarity index 93% rename from src/soc/amd/sabrina/acpi/globalnvs.asl rename to src/soc/amd/mendocino/acpi/globalnvs.asl index 19d58d5ec5..4637916192 100644 --- a/src/soc/amd/sabrina/acpi/globalnvs.asl +++ b/src/soc/amd/mendocino/acpi/globalnvs.asl @@ -4,7 +4,7 @@ /* * NOTE: The layout of the GNVS structure below must match the layout in - * soc/amd/sabrina/include/soc/nvs.h !!! + * soc/amd/mendocino/include/soc/nvs.h !!! */ Field (GNVS, ByteAcc, NoLock, Preserve) diff --git a/src/soc/amd/sabrina/acpi/mmio.asl b/src/soc/amd/mendocino/acpi/mmio.asl similarity index 100% rename from src/soc/amd/sabrina/acpi/mmio.asl rename to src/soc/amd/mendocino/acpi/mmio.asl diff --git a/src/soc/amd/sabrina/acpi/pci0.asl b/src/soc/amd/mendocino/acpi/pci0.asl similarity index 100% rename from src/soc/amd/sabrina/acpi/pci0.asl rename to src/soc/amd/mendocino/acpi/pci0.asl diff --git a/src/soc/amd/sabrina/acpi/pci_int_defs.asl b/src/soc/amd/mendocino/acpi/pci_int_defs.asl similarity index 100% rename from src/soc/amd/sabrina/acpi/pci_int_defs.asl rename to src/soc/amd/mendocino/acpi/pci_int_defs.asl diff --git a/src/soc/amd/sabrina/acpi/rtc_workaround.asl b/src/soc/amd/mendocino/acpi/rtc_workaround.asl similarity index 100% rename from src/soc/amd/sabrina/acpi/rtc_workaround.asl rename to src/soc/amd/mendocino/acpi/rtc_workaround.asl diff --git a/src/soc/amd/sabrina/acpi/soc.asl b/src/soc/amd/mendocino/acpi/soc.asl similarity index 100% rename from src/soc/amd/sabrina/acpi/soc.asl rename to src/soc/amd/mendocino/acpi/soc.asl diff --git a/src/soc/amd/sabrina/agesa_acpi.c b/src/soc/amd/mendocino/agesa_acpi.c similarity index 100% rename from src/soc/amd/sabrina/agesa_acpi.c rename to src/soc/amd/mendocino/agesa_acpi.c diff --git a/src/soc/amd/sabrina/aoac.c b/src/soc/amd/mendocino/aoac.c similarity index 100% rename from src/soc/amd/sabrina/aoac.c rename to src/soc/amd/mendocino/aoac.c diff --git a/src/soc/amd/sabrina/bootblock.c b/src/soc/amd/mendocino/bootblock.c similarity index 100% rename from src/soc/amd/sabrina/bootblock.c rename to src/soc/amd/mendocino/bootblock.c diff --git a/src/soc/amd/sabrina/chip.c b/src/soc/amd/mendocino/chip.c similarity index 92% rename from src/soc/amd/sabrina/chip.c rename to src/soc/amd/mendocino/chip.c index c00f91b55d..41b244669f 100644 --- a/src/soc/amd/sabrina/chip.c +++ b/src/soc/amd/mendocino/chip.c @@ -19,7 +19,7 @@ /* Supplied by i2c.c */ extern struct device_operations soc_amd_i2c_mmio_ops; /* Supplied by uart.c */ -extern struct device_operations sabrina_uart_mmio_ops; +extern struct device_operations mendocino_uart_mmio_ops; struct device_operations cpu_bus_ops = { .read_resources = noop_read_resources, @@ -62,7 +62,7 @@ static void set_mmio_dev_ops(struct device *dev) case APU_UART2_BASE: case APU_UART3_BASE: case APU_UART4_BASE: - dev->ops = &sabrina_uart_mmio_ops; + dev->ops = &mendocino_uart_mmio_ops; break; case APU_EMMC_BASE: if (!dev->enabled) @@ -105,8 +105,8 @@ static void soc_final(void *chip_info) fch_final(chip_info); } -struct chip_operations soc_amd_sabrina_ops = { - CHIP_NAME("AMD Sabrina SoC") +struct chip_operations soc_amd_mendocino_ops = { + CHIP_NAME("AMD Mendocino SoC") .enable_dev = enable_dev, .init = soc_init, .final = soc_final diff --git a/src/soc/amd/sabrina/chip.h b/src/soc/amd/mendocino/chip.h similarity index 94% rename from src/soc/amd/sabrina/chip.h rename to src/soc/amd/mendocino/chip.h index 3662605964..97de7e9fe9 100644 --- a/src/soc/amd/sabrina/chip.h +++ b/src/soc/amd/mendocino/chip.h @@ -2,8 +2,8 @@ /* TODO: Check if this is still correct */ -#ifndef SABRINA_CHIP_H -#define SABRINA_CHIP_H +#ifndef MENDOCINO_CHIP_H +#define MENDOCINO_CHIP_H #include #include @@ -12,9 +12,9 @@ #include #include #include -#include +#include -struct soc_amd_sabrina_config { +struct soc_amd_mendocino_config { struct soc_amd_common_config common_config; u8 i2c_scl_reset; struct dw_i2c_bus_config i2c[I2C_CTRLR_COUNT]; @@ -104,4 +104,4 @@ struct soc_amd_sabrina_config { struct usb_phy_config usb_phy; }; -#endif /* SABRINA_CHIP_H */ +#endif /* MENDOCINO_CHIP_H */ diff --git a/src/soc/amd/sabrina/chipset_sabrina.cb b/src/soc/amd/mendocino/chipset_mendocino.cb similarity index 99% rename from src/soc/amd/sabrina/chipset_sabrina.cb rename to src/soc/amd/mendocino/chipset_mendocino.cb index bd5a60daab..3a16123fcd 100644 --- a/src/soc/amd/sabrina/chipset_sabrina.cb +++ b/src/soc/amd/mendocino/chipset_mendocino.cb @@ -1,4 +1,4 @@ -chip soc/amd/sabrina +chip soc/amd/mendocino device cpu_cluster 0 on end device domain 0 on diff --git a/src/soc/amd/sabrina/chipset_rembrandt.cb b/src/soc/amd/mendocino/chipset_rembrandt.cb similarity index 100% rename from src/soc/amd/sabrina/chipset_rembrandt.cb rename to src/soc/amd/mendocino/chipset_rembrandt.cb diff --git a/src/soc/amd/sabrina/config.c b/src/soc/amd/mendocino/config.c similarity index 84% rename from src/soc/amd/sabrina/config.c rename to src/soc/amd/mendocino/config.c index 187f1664bc..9030ed0dab 100644 --- a/src/soc/amd/sabrina/config.c +++ b/src/soc/amd/mendocino/config.c @@ -9,6 +9,6 @@ const struct soc_amd_common_config *soc_get_common_config(void) { /* config_of_soc calls die() internally if cfg was NULL, so no need to re-check */ - const struct soc_amd_sabrina_config *cfg = config_of_soc(); + const struct soc_amd_mendocino_config *cfg = config_of_soc(); return &cfg->common_config; } diff --git a/src/soc/amd/sabrina/cpu.c b/src/soc/amd/mendocino/cpu.c similarity index 98% rename from src/soc/amd/sabrina/cpu.c rename to src/soc/amd/mendocino/cpu.c index d4258a886f..0867595eb6 100644 --- a/src/soc/amd/sabrina/cpu.c +++ b/src/soc/amd/mendocino/cpu.c @@ -78,7 +78,7 @@ static struct device_operations cpu_dev_ops = { }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, SABRINA_A0_CPUID}, + { X86_VENDOR_AMD, MENDOCINO_A0_CPUID}, { 0, 0 }, }; diff --git a/src/soc/amd/sabrina/data_fabric.c b/src/soc/amd/mendocino/data_fabric.c similarity index 100% rename from src/soc/amd/sabrina/data_fabric.c rename to src/soc/amd/mendocino/data_fabric.c diff --git a/src/soc/amd/sabrina/early_fch.c b/src/soc/amd/mendocino/early_fch.c similarity index 97% rename from src/soc/amd/sabrina/early_fch.c rename to src/soc/amd/mendocino/early_fch.c index f637e886ce..dceeade0e3 100644 --- a/src/soc/amd/sabrina/early_fch.c +++ b/src/soc/amd/mendocino/early_fch.c @@ -24,7 +24,7 @@ static const struct soc_i2c_scl_pin i2c_scl_pins[] = { static void reset_i2c_peripherals(void) { - const struct soc_amd_sabrina_config *cfg = config_of_soc(); + const struct soc_amd_mendocino_config *cfg = config_of_soc(); struct soc_i2c_peripheral_reset_info reset_info; reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK; diff --git a/src/soc/amd/sabrina/espi_util.c b/src/soc/amd/mendocino/espi_util.c similarity index 100% rename from src/soc/amd/sabrina/espi_util.c rename to src/soc/amd/mendocino/espi_util.c diff --git a/src/soc/amd/sabrina/fch.c b/src/soc/amd/mendocino/fch.c similarity index 98% rename from src/soc/amd/sabrina/fch.c rename to src/soc/amd/mendocino/fch.c index 7368222338..e86cd318ce 100644 --- a/src/soc/amd/sabrina/fch.c +++ b/src/soc/amd/mendocino/fch.c @@ -130,7 +130,7 @@ static void fch_init_acpi_ports(void) /* configure the general purpose PCIe clock outputs according to the devicetree settings */ static void gpp_clk_setup(void) { - const struct soc_amd_sabrina_config *cfg = config_of_soc(); + const struct soc_amd_mendocino_config *cfg = config_of_soc(); /* look-up table to be able to iterate over the PCIe clock output settings */ const uint8_t gpp_clk_shift_lut[GPP_CLK_OUTPUT_COUNT] = { diff --git a/src/soc/amd/sabrina/fsp_m_params.c b/src/soc/amd/mendocino/fsp_m_params.c similarity index 97% rename from src/soc/amd/sabrina/fsp_m_params.c rename to src/soc/amd/mendocino/fsp_m_params.c index 70ebc7772a..15fde28b6f 100644 --- a/src/soc/amd/sabrina/fsp_m_params.c +++ b/src/soc/amd/mendocino/fsp_m_params.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include "chip.h" __weak void mb_pre_fspm(FSP_M_CONFIG *mcfg) @@ -69,7 +69,7 @@ static void fsp_assign_ioapic_upds(FSP_M_CONFIG *mcfg) void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *mcfg = &mupd->FspmConfig; - const struct soc_amd_sabrina_config *config = config_of_soc(); + const struct soc_amd_mendocino_config *config = config_of_soc(); mupd->FspmArchUpd.NvsBufferPtr = (uintptr_t)soc_fill_apob_cache(); diff --git a/src/soc/amd/sabrina/fsp_s_params.c b/src/soc/amd/mendocino/fsp_s_params.c similarity index 100% rename from src/soc/amd/sabrina/fsp_s_params.c rename to src/soc/amd/mendocino/fsp_s_params.c diff --git a/src/soc/amd/sabrina/fw.cfg b/src/soc/amd/mendocino/fw.cfg similarity index 100% rename from src/soc/amd/sabrina/fw.cfg rename to src/soc/amd/mendocino/fw.cfg diff --git a/src/soc/amd/sabrina/gpio.c b/src/soc/amd/mendocino/gpio.c similarity index 100% rename from src/soc/amd/sabrina/gpio.c rename to src/soc/amd/mendocino/gpio.c diff --git a/src/soc/amd/sabrina/i2c.c b/src/soc/amd/mendocino/i2c.c similarity index 90% rename from src/soc/amd/sabrina/i2c.c rename to src/soc/amd/mendocino/i2c.c index e805eff339..06c60ab5fe 100644 --- a/src/soc/amd/sabrina/i2c.c +++ b/src/soc/amd/mendocino/i2c.c @@ -34,7 +34,7 @@ void i2c_set_bar(unsigned int bus, uintptr_t bar) void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg) { - const struct soc_amd_sabrina_config *config = config_of_soc(); + const struct soc_amd_mendocino_config *config = config_of_soc(); if (bus >= ARRAY_SIZE(config->i2c_pad)) return; @@ -50,7 +50,7 @@ const struct soc_i2c_ctrlr_info *soc_get_i2c_ctrlr_info(size_t *num_ctrlrs) const struct dw_i2c_bus_config *soc_get_i2c_bus_config(size_t *num_buses) { - const struct soc_amd_sabrina_config *config = config_of_soc(); + const struct soc_amd_mendocino_config *config = config_of_soc(); *num_buses = ARRAY_SIZE(config->i2c); return config->i2c; diff --git a/src/soc/amd/sabrina/include/soc/acpi.h b/src/soc/amd/mendocino/include/soc/acpi.h similarity index 82% rename from src/soc/amd/sabrina/include/soc/acpi.h rename to src/soc/amd/mendocino/include/soc/acpi.h index 802d443c17..36b3c1c747 100644 --- a/src/soc/amd/sabrina/include/soc/acpi.h +++ b/src/soc/amd/mendocino/include/soc/acpi.h @@ -2,8 +2,8 @@ /* TODO: Check if this is still correct */ -#ifndef AMD_SABRINA_ACPI_H -#define AMD_SABRINA_ACPI_H +#ifndef AMD_MENDOCINO_ACPI_H +#define AMD_MENDOCINO_ACPI_H #include #include @@ -20,4 +20,4 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp); -#endif /* AMD_SABRINA_ACPI_H */ +#endif /* AMD_MENDOCINO_ACPI_H */ diff --git a/src/soc/amd/sabrina/include/soc/amd_pci_int_defs.h b/src/soc/amd/mendocino/include/soc/amd_pci_int_defs.h similarity index 94% rename from src/soc/amd/sabrina/include/soc/amd_pci_int_defs.h rename to src/soc/amd/mendocino/include/soc/amd_pci_int_defs.h index 424b2245d3..35e0d90c14 100644 --- a/src/soc/amd/sabrina/include/soc/amd_pci_int_defs.h +++ b/src/soc/amd/mendocino/include/soc/amd_pci_int_defs.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_AMD_PCI_INT_DEFS_H -#define AMD_SABRINA_AMD_PCI_INT_DEFS_H +#ifndef AMD_MENDOCINO_AMD_PCI_INT_DEFS_H +#define AMD_MENDOCINO_AMD_PCI_INT_DEFS_H /* * PIRQ and device routing - these define the index into the @@ -59,4 +59,4 @@ #define PIRQ_UART2 0x78 /* UART2 */ #define PIRQ_UART3 0x79 /* UART3 */ -#endif /* AMD_SABRINA_AMD_PCI_INT_DEFS_H */ +#endif /* AMD_MENDOCINO_AMD_PCI_INT_DEFS_H */ diff --git a/src/soc/amd/sabrina/include/soc/aoac_defs.h b/src/soc/amd/mendocino/include/soc/aoac_defs.h similarity index 84% rename from src/soc/amd/sabrina/include/soc/aoac_defs.h rename to src/soc/amd/mendocino/include/soc/aoac_defs.h index 4b2b4fe580..46fb318aea 100644 --- a/src/soc/amd/sabrina/include/soc/aoac_defs.h +++ b/src/soc/amd/mendocino/include/soc/aoac_defs.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_AOAC_DEFS_H -#define AMD_SABRINA_AOAC_DEFS_H +#ifndef AMD_MENDOCINO_AOAC_DEFS_H +#define AMD_MENDOCINO_AOAC_DEFS_H /* FCH AOAC device offsets for AOAC_DEV_D3_CTL/AOAC_DEV_D3_STATE */ #define FCH_AOAC_DEV_CLK_GEN 0 @@ -20,4 +20,4 @@ #define FCH_AOAC_DEV_ESPI 27 #define FCH_AOAC_DEV_EMMC 28 -#endif /* AMD_SABRINA_AOAC_DEFS_H */ +#endif /* AMD_MENDOCINO_AOAC_DEFS_H */ diff --git a/src/soc/amd/mendocino/include/soc/cpu.h b/src/soc/amd/mendocino/include/soc/cpu.h new file mode 100644 index 0000000000..e0202bbafe --- /dev/null +++ b/src/soc/amd/mendocino/include/soc/cpu.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_MENDOCINO_CPU_H +#define AMD_MENDOCINO_CPU_H + +#define MENDOCINO_A0_CPUID 0x008a0f00 + +#endif /* AMD_MENDOCINO_CPU_H */ diff --git a/src/soc/amd/sabrina/include/soc/data_fabric.h b/src/soc/amd/mendocino/include/soc/data_fabric.h similarity index 67% rename from src/soc/amd/sabrina/include/soc/data_fabric.h rename to src/soc/amd/mendocino/include/soc/data_fabric.h index fbae1c6591..c7727bb484 100644 --- a/src/soc/amd/sabrina/include/soc/data_fabric.h +++ b/src/soc/amd/mendocino/include/soc/data_fabric.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_DATA_FABRIC_H -#define AMD_SABRINA_DATA_FABRIC_H +#ifndef AMD_MENDOCINO_DATA_FABRIC_H +#define AMD_MENDOCINO_DATA_FABRIC_H #include @@ -14,4 +14,4 @@ void data_fabric_set_mmio_np(void); -#endif /* AMD_SABRINA_DATA_FABRIC_H */ +#endif /* AMD_MENDOCINO_DATA_FABRIC_H */ diff --git a/src/soc/amd/mendocino/include/soc/espi.h b/src/soc/amd/mendocino/include/soc/espi.h new file mode 100644 index 0000000000..9d606106c0 --- /dev/null +++ b/src/soc/amd/mendocino/include/soc/espi.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_MENDOCINO_ESPI_H +#define AMD_MENDOCINO_ESPI_H + +void espi_switch_to_spi1_pads(void); + +#endif /* AMD_MENDOCINO_ESPI_H */ diff --git a/src/soc/amd/sabrina/include/soc/gpio.h b/src/soc/amd/mendocino/include/soc/gpio.h similarity index 99% rename from src/soc/amd/sabrina/include/soc/gpio.h rename to src/soc/amd/mendocino/include/soc/gpio.h index 1cd72cd69e..39dda2c53b 100644 --- a/src/soc/amd/sabrina/include/soc/gpio.h +++ b/src/soc/amd/mendocino/include/soc/gpio.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_GPIO_H -#define AMD_SABRINA_GPIO_H +#ifndef AMD_MENDOCINO_GPIO_H +#define AMD_MENDOCINO_GPIO_H #define GPIO_DEVICE_NAME "AMD0030" #define GPIO_DEVICE_DESC "GPIO Controller" @@ -321,4 +321,4 @@ #define GPIO_157_IOMUX_GPIOxx 0 #define GPIO_157_IOMUX_UART4_INTR 1 -#endif /* AMD_SABRINA_GPIO_H */ +#endif /* AMD_MENDOCINO_GPIO_H */ diff --git a/src/soc/amd/sabrina/include/soc/i2c.h b/src/soc/amd/mendocino/include/soc/i2c.h similarity index 88% rename from src/soc/amd/sabrina/include/soc/i2c.h rename to src/soc/amd/mendocino/include/soc/i2c.h index 023bb34ac7..d06a92d5bc 100644 --- a/src/soc/amd/sabrina/include/soc/i2c.h +++ b/src/soc/amd/mendocino/include/soc/i2c.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_I2C_H -#define AMD_SABRINA_I2C_H +#ifndef AMD_MENDOCINO_I2C_H +#define AMD_MENDOCINO_I2C_H #include #include @@ -25,4 +25,4 @@ void i2c_set_bar(unsigned int bus, uintptr_t bar); -#endif /* AMD_SABRINA_I2C_H */ +#endif /* AMD_MENDOCINO_I2C_H */ diff --git a/src/soc/amd/sabrina/include/soc/iomap.h b/src/soc/amd/mendocino/include/soc/iomap.h similarity index 94% rename from src/soc/amd/sabrina/include/soc/iomap.h rename to src/soc/amd/mendocino/include/soc/iomap.h index 7f9746b97f..630940bb3f 100644 --- a/src/soc/amd/sabrina/include/soc/iomap.h +++ b/src/soc/amd/mendocino/include/soc/iomap.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_IOMAP_H -#define AMD_SABRINA_IOMAP_H +#ifndef AMD_MENDOCINO_IOMAP_H +#define AMD_MENDOCINO_IOMAP_H #define I2C_MASTER_DEV_COUNT 4 #define I2C_MASTER_START_INDEX 0 @@ -54,4 +54,4 @@ #define ACPI_GPE0_EN (ACPI_GPE0_BLK + 0x04) #define SMB_BASE_ADDR 0x0b00 -#endif /* AMD_SABRINA_IOMAP_H */ +#endif /* AMD_MENDOCINO_IOMAP_H */ diff --git a/src/soc/amd/sabrina/include/soc/lpc.h b/src/soc/amd/mendocino/include/soc/lpc.h similarity index 89% rename from src/soc/amd/sabrina/include/soc/lpc.h rename to src/soc/amd/mendocino/include/soc/lpc.h index f0a9257679..09f7bfce4e 100644 --- a/src/soc/amd/sabrina/include/soc/lpc.h +++ b/src/soc/amd/mendocino/include/soc/lpc.h @@ -2,8 +2,8 @@ /* TODO: Check if this is still correct */ -#ifndef AMD_SABRINA_LPC_H -#define AMD_SABRINA_LPC_H +#ifndef AMD_MENDOCINO_LPC_H +#define AMD_MENDOCINO_LPC_H /* LPC_MISC_CONTROL_BITS at D14F3x078 */ /* The definitions of bits 9 and 10 are swapped on Picasso and older compared to Renoir/Cezanne @@ -21,4 +21,4 @@ #define SPI_ROM_ALT_ENABLE BIT(0) #define SPI_PRESERVE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4)) -#endif /* AMD_SABRINA_LPC_H */ +#endif /* AMD_MENDOCINO_LPC_H */ diff --git a/src/soc/amd/sabrina/include/soc/msr.h b/src/soc/amd/mendocino/include/soc/msr.h similarity index 93% rename from src/soc/amd/sabrina/include/soc/msr.h rename to src/soc/amd/mendocino/include/soc/msr.h index 9dba2697e2..bec4de80b4 100644 --- a/src/soc/amd/sabrina/include/soc/msr.h +++ b/src/soc/amd/mendocino/include/soc/msr.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_MSR_H -#define AMD_SABRINA_MSR_H +#ifndef AMD_MENDOCINO_MSR_H +#define AMD_MENDOCINO_MSR_H /* MSRC001_00[6B:64] P-state [7:0] bit definitions */ #define PSTATE_DEF_HI_ENABLE_SHIFT 31 @@ -28,4 +28,4 @@ #define MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT 0xe7 #define MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT 0xe8 -#endif /* AMD_SABRINA_MSR_H */ +#endif /* AMD_MENDOCINO_MSR_H */ diff --git a/src/soc/amd/sabrina/include/soc/nvs.h b/src/soc/amd/mendocino/include/soc/nvs.h similarity index 83% rename from src/soc/amd/sabrina/include/soc/nvs.h rename to src/soc/amd/mendocino/include/soc/nvs.h index 95b7392b61..bcf9bb0e5f 100644 --- a/src/soc/amd/sabrina/include/soc/nvs.h +++ b/src/soc/amd/mendocino/include/soc/nvs.h @@ -4,12 +4,12 @@ /* * NOTE: The layout of the global_nvs structure below must match the layout - * in soc/soc/amd/sabrina/acpi/globalnvs.asl !!! + * in soc/soc/amd/mendocino/acpi/globalnvs.asl !!! * */ -#ifndef AMD_SABRINA_NVS_H -#define AMD_SABRINA_NVS_H +#ifndef AMD_MENDOCINO_NVS_H +#define AMD_MENDOCINO_NVS_H #include @@ -26,4 +26,4 @@ struct __packed global_nvs { uint8_t tpsv; /* 0x19 - Passive Threshold */ }; -#endif /* AMD_SABRINA_NVS_H */ +#endif /* AMD_MENDOCINO_NVS_H */ diff --git a/src/soc/amd/sabrina/include/soc/pci_devs.h b/src/soc/amd/mendocino/include/soc/pci_devs.h similarity index 97% rename from src/soc/amd/sabrina/include/soc/pci_devs.h rename to src/soc/amd/mendocino/include/soc/pci_devs.h index 53e4f1a910..14c8300891 100644 --- a/src/soc/amd/sabrina/include/soc/pci_devs.h +++ b/src/soc/amd/mendocino/include/soc/pci_devs.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_PCI_DEVS_H -#define AMD_SABRINA_PCI_DEVS_H +#ifndef AMD_MENDOCINO_PCI_DEVS_H +#define AMD_MENDOCINO_PCI_DEVS_H #include #include @@ -130,4 +130,4 @@ #define DF_F7_DEVFN PCI_DEVFN(DF_DEV, 7) #define SOC_DF_F7_DEV _SOC_DEV(DF_DEV, 7) -#endif /* AMD_SABRINA_PCI_DEVS_H */ +#endif /* AMD_MENDOCINO_PCI_DEVS_H */ diff --git a/src/soc/amd/sabrina/include/soc/platform_descriptors.h b/src/soc/amd/mendocino/include/soc/platform_descriptors.h similarity index 75% rename from src/soc/amd/sabrina/include/soc/platform_descriptors.h rename to src/soc/amd/mendocino/include/soc/platform_descriptors.h index faa81e7555..663f98aca7 100644 --- a/src/soc/amd/sabrina/include/soc/platform_descriptors.h +++ b/src/soc/amd/mendocino/include/soc/platform_descriptors.h @@ -2,8 +2,8 @@ /* TODO: Check if this is still correct */ -#ifndef AMD_SABRINA_PLATFORM_DESCRIPTORS_H -#define AMD_SABRINA_PLATFORM_DESCRIPTORS_H +#ifndef AMD_MENDOCINO_PLATFORM_DESCRIPTORS_H +#define AMD_MENDOCINO_PLATFORM_DESCRIPTORS_H #include #include @@ -16,4 +16,4 @@ void mainboard_get_dxio_ddi_descriptors( void mb_pre_fspm(FSP_M_CONFIG *mcfg); -#endif /* AMD_SABRINA_PLATFORM_DESCRIPTORS_H */ +#endif /* AMD_MENDOCINO_PLATFORM_DESCRIPTORS_H */ diff --git a/src/soc/amd/sabrina/include/soc/psp_transfer.h b/src/soc/amd/mendocino/include/soc/psp_transfer.h similarity index 94% rename from src/soc/amd/sabrina/include/soc/psp_transfer.h rename to src/soc/amd/mendocino/include/soc/psp_transfer.h index 6e3faaf16b..3612f176b2 100644 --- a/src/soc/amd/sabrina/include/soc/psp_transfer.h +++ b/src/soc/amd/mendocino/include/soc/psp_transfer.h @@ -2,8 +2,8 @@ /* TODO: Check if this is still correct */ -#ifndef AMD_SABRINA_PSP_TRANSFER_H -#define AMD_SABRINA_PSP_TRANSFER_H +#ifndef AMD_MENDOCINO_PSP_TRANSFER_H +#define AMD_MENDOCINO_PSP_TRANSFER_H # if (CONFIG_CMOS_RECOVERY_BYTE != 0) # define CMOS_RECOVERY_BYTE CONFIG_CMOS_RECOVERY_BYTE @@ -61,4 +61,4 @@ void replay_transfer_buffer_cbmemc(void); void boot_with_psp_timestamp(uint64_t base_timestamp); #endif -#endif /* AMD_SABRINA_PSP_TRANSFER_H */ +#endif /* AMD_MENDOCINO_PSP_TRANSFER_H */ diff --git a/src/soc/amd/sabrina/include/soc/psp_verstage_addr.h b/src/soc/amd/mendocino/include/soc/psp_verstage_addr.h similarity index 80% rename from src/soc/amd/sabrina/include/soc/psp_verstage_addr.h rename to src/soc/amd/mendocino/include/soc/psp_verstage_addr.h index c8f07c9a57..389f53e61d 100644 --- a/src/soc/amd/sabrina/include/soc/psp_verstage_addr.h +++ b/src/soc/amd/mendocino/include/soc/psp_verstage_addr.h @@ -2,8 +2,8 @@ /* TODO: Check if this is still correct */ -#ifndef AMD_SABRINA_PSP_VERSTAGE_ADDR_H -#define AMD_SABRINA_PSP_VERSTAGE_ADDR_H +#ifndef AMD_MENDOCINO_PSP_VERSTAGE_ADDR_H +#define AMD_MENDOCINO_PSP_VERSTAGE_ADDR_H /* * Start of available space is 0x0 and this is where the @@ -22,4 +22,4 @@ #define PSP_VERSTAGE_STACK_START 0x2a000 #define PSP_VERSTAGE_STACK_SIZE (40K) -#endif /* AMD_SABRINA_PSP_VERSTAGE_ADDR_H */ +#endif /* AMD_MENDOCINO_PSP_VERSTAGE_ADDR_H */ diff --git a/src/soc/amd/sabrina/include/soc/smi.h b/src/soc/amd/mendocino/include/soc/smi.h similarity index 98% rename from src/soc/amd/sabrina/include/soc/smi.h rename to src/soc/amd/mendocino/include/soc/smi.h index 1642c06151..1525e34199 100644 --- a/src/soc/amd/sabrina/include/soc/smi.h +++ b/src/soc/amd/mendocino/include/soc/smi.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#ifndef AMD_SABRINA_SMI_H -#define AMD_SABRINA_SMI_H +#ifndef AMD_MENDOCINO_SMI_H +#define AMD_MENDOCINO_SMI_H #include @@ -186,4 +186,4 @@ #define SMI_MODE_MASK 0x03 -#endif /* AMD_SABRINA_SMI_H */ +#endif /* AMD_MENDOCINO_SMI_H */ diff --git a/src/soc/amd/sabrina/include/soc/smu.h b/src/soc/amd/mendocino/include/soc/smu.h similarity index 84% rename from src/soc/amd/sabrina/include/soc/smu.h rename to src/soc/amd/mendocino/include/soc/smu.h index d4990c0c3a..c2c629e25d 100644 --- a/src/soc/amd/sabrina/include/soc/smu.h +++ b/src/soc/amd/mendocino/include/soc/smu.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_SMU_H -#define AMD_SABRINA_SMU_H +#ifndef AMD_MENDOCINO_SMU_H +#define AMD_MENDOCINO_SMU_H /* SMU mailbox register offsets in SMN */ #define SMN_SMU_MESG_ID 0x3b10528 @@ -20,4 +20,4 @@ enum smu_message_id { */ void smu_sx_entry(void); -#endif /* AMD_SABRINA_SMU_H */ +#endif /* AMD_MENDOCINO_SMU_H */ diff --git a/src/soc/amd/sabrina/include/soc/southbridge.h b/src/soc/amd/mendocino/include/soc/southbridge.h similarity index 97% rename from src/soc/amd/sabrina/include/soc/southbridge.h rename to src/soc/amd/mendocino/include/soc/southbridge.h index 789e73ff83..a5a1be4780 100644 --- a/src/soc/amd/sabrina/include/soc/southbridge.h +++ b/src/soc/amd/mendocino/include/soc/southbridge.h @@ -2,8 +2,8 @@ /* TODO: Check if this is still correct */ -#ifndef AMD_SABRINA_SOUTHBRIDGE_H -#define AMD_SABRINA_SOUTHBRIDGE_H +#ifndef AMD_MENDOCINO_SOUTHBRIDGE_H +#define AMD_MENDOCINO_SOUTHBRIDGE_H #include @@ -124,4 +124,4 @@ void fch_final(void *chip_info); void enable_aoac_devices(void); void wait_for_aoac_enabled(unsigned int dev); -#endif /* AMD_SABRINA_SOUTHBRIDGE_H */ +#endif /* AMD_MENDOCINO_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/sabrina/include/soc/uart.h b/src/soc/amd/mendocino/include/soc/uart.h similarity index 72% rename from src/soc/amd/sabrina/include/soc/uart.h rename to src/soc/amd/mendocino/include/soc/uart.h index 27e6248de5..6e22ef758b 100644 --- a/src/soc/amd/sabrina/include/soc/uart.h +++ b/src/soc/amd/mendocino/include/soc/uart.h @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_SABRINA_UART_H -#define AMD_SABRINA_UART_H +#ifndef AMD_MENDOCINO_UART_H +#define AMD_MENDOCINO_UART_H #include void set_uart_config(unsigned int idx); /* configure hardware of FCH UART selected by idx */ void clear_uart_legacy_config(void); /* disable legacy I/O decode for FCH UART */ -#endif /* AMD_SABRINA_UART_H */ +#endif /* AMD_MENDOCINO_UART_H */ diff --git a/src/soc/amd/sabrina/mca.c b/src/soc/amd/mendocino/mca.c similarity index 100% rename from src/soc/amd/sabrina/mca.c rename to src/soc/amd/mendocino/mca.c diff --git a/src/soc/amd/sabrina/preload.c b/src/soc/amd/mendocino/preload.c similarity index 100% rename from src/soc/amd/sabrina/preload.c rename to src/soc/amd/mendocino/preload.c diff --git a/src/soc/amd/mendocino/psp_verstage/Makefile.inc b/src/soc/amd/mendocino/psp_verstage/Makefile.inc new file mode 100644 index 0000000000..b6819a1cf6 --- /dev/null +++ b/src/soc/amd/mendocino/psp_verstage/Makefile.inc @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0-only + +# TODO(b/239090306): Check if this is still correct + +verstage-generic-ccopts += -I$(src)/soc/amd/mendocino/psp_verstage/include +verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/mendocino/include + +verstage-generic-ccopts += -I$(src)/soc/amd/common/psp_verstage/include + +subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../../common/psp_verstage + +verstage-y += svc.c +verstage-y += chipset.c +verstage-y += uart.c + +verstage-y += $(top)/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S +verstage-y += $(top)/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S diff --git a/src/soc/amd/sabrina/psp_verstage/chipset.c b/src/soc/amd/mendocino/psp_verstage/chipset.c similarity index 100% rename from src/soc/amd/sabrina/psp_verstage/chipset.c rename to src/soc/amd/mendocino/psp_verstage/chipset.c diff --git a/src/soc/amd/sabrina/psp_verstage/svc.c b/src/soc/amd/mendocino/psp_verstage/svc.c similarity index 100% rename from src/soc/amd/sabrina/psp_verstage/svc.c rename to src/soc/amd/mendocino/psp_verstage/svc.c diff --git a/src/soc/amd/sabrina/psp_verstage/svc.h b/src/soc/amd/mendocino/psp_verstage/svc.h similarity index 100% rename from src/soc/amd/sabrina/psp_verstage/svc.h rename to src/soc/amd/mendocino/psp_verstage/svc.h diff --git a/src/soc/amd/sabrina/psp_verstage/uart.c b/src/soc/amd/mendocino/psp_verstage/uart.c similarity index 100% rename from src/soc/amd/sabrina/psp_verstage/uart.c rename to src/soc/amd/mendocino/psp_verstage/uart.c diff --git a/src/soc/amd/sabrina/reset.c b/src/soc/amd/mendocino/reset.c similarity index 100% rename from src/soc/amd/sabrina/reset.c rename to src/soc/amd/mendocino/reset.c diff --git a/src/soc/amd/sabrina/romstage.c b/src/soc/amd/mendocino/romstage.c similarity index 100% rename from src/soc/amd/sabrina/romstage.c rename to src/soc/amd/mendocino/romstage.c diff --git a/src/soc/amd/sabrina/root_complex.c b/src/soc/amd/mendocino/root_complex.c similarity index 99% rename from src/soc/amd/sabrina/root_complex.c rename to src/soc/amd/mendocino/root_complex.c index 99602e803b..a5371f223c 100644 --- a/src/soc/amd/sabrina/root_complex.c +++ b/src/soc/amd/mendocino/root_complex.c @@ -186,7 +186,7 @@ static void root_complex_init(struct device *dev) static void acipgen_dptci(void) { - const struct soc_amd_sabrina_config *config = config_of_soc(); + const struct soc_amd_mendocino_config *config = config_of_soc(); if (!config->dptc_enable) return; diff --git a/src/soc/amd/sabrina/smihandler.c b/src/soc/amd/mendocino/smihandler.c similarity index 100% rename from src/soc/amd/sabrina/smihandler.c rename to src/soc/amd/mendocino/smihandler.c diff --git a/src/soc/amd/sabrina/smu.c b/src/soc/amd/mendocino/smu.c similarity index 100% rename from src/soc/amd/sabrina/smu.c rename to src/soc/amd/mendocino/smu.c diff --git a/src/soc/amd/sabrina/uart.c b/src/soc/amd/mendocino/uart.c similarity index 98% rename from src/soc/amd/sabrina/uart.c rename to src/soc/amd/mendocino/uart.c index 981e6f0b60..66e0cf1caa 100644 --- a/src/soc/amd/sabrina/uart.c +++ b/src/soc/amd/mendocino/uart.c @@ -117,7 +117,7 @@ static void uart_read_resources(struct device *dev) mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4); } -struct device_operations sabrina_uart_mmio_ops = { +struct device_operations mendocino_uart_mmio_ops = { .read_resources = uart_read_resources, .set_resources = noop_set_resources, .scan_bus = scan_static_bus, diff --git a/src/soc/amd/sabrina/xhci.c b/src/soc/amd/mendocino/xhci.c similarity index 100% rename from src/soc/amd/sabrina/xhci.c rename to src/soc/amd/mendocino/xhci.c diff --git a/src/soc/amd/sabrina/include/soc/cpu.h b/src/soc/amd/sabrina/include/soc/cpu.h deleted file mode 100644 index b7578139de..0000000000 --- a/src/soc/amd/sabrina/include/soc/cpu.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef AMD_SABRINA_CPU_H -#define AMD_SABRINA_CPU_H - -#define SABRINA_A0_CPUID 0x008a0f00 - -#endif /* AMD_SABRINA_CPU_H */ diff --git a/src/soc/amd/sabrina/include/soc/espi.h b/src/soc/amd/sabrina/include/soc/espi.h deleted file mode 100644 index 76af3a1dc9..0000000000 --- a/src/soc/amd/sabrina/include/soc/espi.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef AMD_SABRINA_ESPI_H -#define AMD_SABRINA_ESPI_H - -void espi_switch_to_spi1_pads(void); - -#endif /* AMD_SABRINA_ESPI_H */ diff --git a/src/soc/amd/sabrina/psp_verstage/Makefile.inc b/src/soc/amd/sabrina/psp_verstage/Makefile.inc deleted file mode 100644 index 2338bf5e47..0000000000 --- a/src/soc/amd/sabrina/psp_verstage/Makefile.inc +++ /dev/null @@ -1,17 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -# TODO: Check if this is still correct - -verstage-generic-ccopts += -I$(src)/soc/amd/sabrina/psp_verstage/include -verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/sabrina/include - -verstage-generic-ccopts += -I$(src)/soc/amd/common/psp_verstage/include - -subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../../common/psp_verstage - -verstage-y += svc.c -verstage-y += chipset.c -verstage-y += uart.c - -verstage-y += $(top)/src/vendorcode/amd/fsp/sabrina/bl_uapp/bl_uapp_startup.S -verstage-y += $(top)/src/vendorcode/amd/fsp/sabrina/bl_uapp/bl_uapp_end.S diff --git a/src/vendorcode/amd/fsp/sabrina/FspGuids.h b/src/vendorcode/amd/fsp/mendocino/FspGuids.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/FspGuids.h rename to src/vendorcode/amd/fsp/mendocino/FspGuids.h diff --git a/src/vendorcode/amd/fsp/sabrina/FspUpd.h b/src/vendorcode/amd/fsp/mendocino/FspUpd.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/FspUpd.h rename to src/vendorcode/amd/fsp/mendocino/FspUpd.h diff --git a/src/vendorcode/amd/fsp/sabrina/FspUsb.h b/src/vendorcode/amd/fsp/mendocino/FspUsb.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/FspUsb.h rename to src/vendorcode/amd/fsp/mendocino/FspUsb.h diff --git a/src/vendorcode/amd/fsp/sabrina/FspmUpd.h b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/FspmUpd.h rename to src/vendorcode/amd/fsp/mendocino/FspmUpd.h diff --git a/src/vendorcode/amd/fsp/sabrina/FspsUpd.h b/src/vendorcode/amd/fsp/mendocino/FspsUpd.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/FspsUpd.h rename to src/vendorcode/amd/fsp/mendocino/FspsUpd.h diff --git a/src/vendorcode/amd/fsp/sabrina/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/bl_uapp/bl_uapp_end.S rename to src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S diff --git a/src/vendorcode/amd/fsp/sabrina/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_header.inc similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/bl_uapp/bl_uapp_header.inc rename to src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_header.inc diff --git a/src/vendorcode/amd/fsp/sabrina/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/bl_uapp/bl_uapp_startup.S rename to src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S diff --git a/src/vendorcode/amd/fsp/sabrina/dmi_info.h b/src/vendorcode/amd/fsp/mendocino/dmi_info.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/dmi_info.h rename to src/vendorcode/amd/fsp/mendocino/dmi_info.h diff --git a/src/vendorcode/amd/fsp/sabrina/fsp_h_c99.h b/src/vendorcode/amd/fsp/mendocino/fsp_h_c99.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/fsp_h_c99.h rename to src/vendorcode/amd/fsp/mendocino/fsp_h_c99.h diff --git a/src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_errorcodes_public.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_errorcodes_public.h rename to src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_errorcodes_public.h diff --git a/src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_syscall_public.h similarity index 100% rename from src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h rename to src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_syscall_public.h diff --git a/src/vendorcode/amd/fsp/sabrina/platform_descriptors.h b/src/vendorcode/amd/fsp/mendocino/platform_descriptors.h similarity index 97% rename from src/vendorcode/amd/fsp/sabrina/platform_descriptors.h rename to src/vendorcode/amd/fsp/mendocino/platform_descriptors.h index cc6b78cfdd..7dae872f2d 100644 --- a/src/vendorcode/amd/fsp/sabrina/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/mendocino/platform_descriptors.h @@ -160,11 +160,11 @@ typedef struct __packed { } fsp_ddi_descriptor; /* - * Sabrina DXIO Descriptor: Used for assigning lanes to PCIe engines, configure + * Mendocino DXIO Descriptor: Used for assigning lanes to PCIe engines, configure * bifurcation and other settings. Beware that the lane numbers in here are the * logical and not the physical lane numbers! * - * Sabrina DXIO logical lane to physical PCIe lane mapping: + * Mendocino DXIO logical lane to physical PCIe lane mapping: * * logical | physical * --------|------------