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* rework tsc based timer code to use inb instead of outb for calibration

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* Add generic Local APIC based timer code. This timer does not need expensive
  calibration and thus reduces the boot time by up to more than a second.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2009-07-21 21:19:06 +00:00
committed by Stefan Reinauer
parent 925b6c0c43
commit 4fbefdd1a9
5 changed files with 83 additions and 3 deletions
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4
src/cpu/x86/tsc/delay_tsc.c
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@ -106,10 +106,10 @@ static unsigned long long calibrate_tsc(void)
printk_spew("Calibrating delay loop...\n");
start = rdtscll();
// no udivdi3, dammit.
// no udivdi3 because we don't like libgcc. (only in x86emu)
// so we count to 1<< 20 and then right shift 20
for(count = 0; count < (1<<20); count ++)
outb(0x80, 0x80);
inb(0x80);
end = rdtscll();
#if 0