ChromeOS: Promote variant_cros_gpio()

The only purpose of mainboard_chromeos_acpi_generate()
was to pass cros_gpio array for ACPI \\OIPG package
generation.

Promote variant_cros_gpio() from baseboards to ChromeOS
declaration.

Change-Id: I5c2ac1dcea35f1f00dea401528404bc6ca0ab53c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58897
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Kyösti Mälkki
2021-11-02 10:36:20 +02:00
committed by Felix Held
parent afe5562ca3
commit 4fdd84e716
70 changed files with 97 additions and 321 deletions

View File

@ -18,11 +18,9 @@ int get_write_protect_state(void)
return 0;
}
static const struct cros_gpio cros_gpios[] = {
/* No ChromeOS GPIOs */
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
/* No ChromeOS GPIOs */
*num = 0;
return NULL;
}

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@ -18,11 +18,9 @@ int get_write_protect_state(void)
return 0;
}
static const struct cros_gpio cros_gpios[] = {
/* No ChromeOS GPIOs */
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
/* No ChromeOS GPIOs */
*num = 0;
return NULL;
}

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@ -20,9 +20,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, "QEMU"),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -36,9 +36,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(CROS_WP_GPIO, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -70,9 +70,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -24,14 +22,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -15,7 +15,6 @@
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_gpio_override_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
const struct pad_config *variant_romstage_gpio_table(size_t *num);
const struct mb_cfg *variant_memory_params(void);

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@ -53,9 +53,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(WP_GPIO, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -60,9 +60,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(0x10013, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -24,15 +22,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -13,7 +13,6 @@
const struct pad_config *variant_base_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct pad_config *variant_sleep_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
const struct pad_config *variant_override_gpio_table(size_t *num);
/**

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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h>
#include <baseboard/gpio.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
@ -42,15 +41,6 @@ static bool raw_get_recovery_mode_switch(void)
return !gpio_get(GPIO_REC_MODE);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *cros_gpios;
size_t num_gpios = 0;
cros_gpios = variant_cros_gpios(&num_gpios);
chromeos_acpi_gpio_generate(cros_gpios, num_gpios);
}
int get_recovery_mode_switch(void)
{

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@ -28,7 +28,5 @@
const struct pad_config *override_gpio_table(size_t *num);
const struct pad_config *override_early_gpio_table(size_t *num);
struct cros_gpio;
const struct cros_gpio *override_cros_gpios(size_t *num);
#endif

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@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stddef.h>
#include <vendorcode/google/chromeos/chromeos.h>
/*
* The next set of functions return the gpio table and fill in the number of
@ -16,8 +15,6 @@ const struct pad_config *variant_base_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct pad_config *variant_override_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
const struct mb_cfg *variant_memory_params(void);
void variant_memory_init(FSPM_UPD *mupd);

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@ -40,15 +40,6 @@ static bool raw_get_recovery_mode_switch(void)
return !gpio_get(GPP_E8);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *cros_gpios;
size_t num_gpios = 0;
cros_gpios = variant_cros_gpios(&num_gpios);
chromeos_acpi_gpio_generate(cros_gpios, num_gpios);
}
int get_recovery_mode_switch(void)
{

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@ -29,7 +29,4 @@
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
struct cros_gpio;
const struct cros_gpio *variant_cros_gpios(size_t *num);
#endif

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@ -32,9 +32,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -3,10 +3,8 @@
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <baseboard/variants.h>
#include <soc/gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <variant/gpio.h>
@ -28,15 +26,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -5,7 +5,6 @@
#include <soc/gpio.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/chromeos.h>
/*
* The next set of functions return the gpio table and fill in the number of
@ -14,8 +13,6 @@
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
void variant_smi_sleep(u8 slp_typ);
struct nhlt;

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@ -31,9 +31,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -23,9 +23,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -1,13 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <variant/gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -26,16 +24,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *cros_gpios;
size_t num_gpios = 0;
cros_gpios = variant_cros_gpios(&num_gpios);
chromeos_acpi_gpio_generate(cros_gpios, num_gpios);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -6,7 +6,6 @@
#include <soc/cnl_memcfg_init.h>
#include <soc/gpio.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/chromeos.h>
/*
* The next set of functions return the gpio table and fill in the number of
@ -28,9 +27,6 @@ const struct pad_config *variant_sleep_gpio_table(u8 slp_typ, size_t *num);
/* Return GPIO pads that need to be configured before ramstage */
const struct pad_config *variant_early_gpio_table(size_t *num);
/* Return ChromeOS gpio table and fill in number of entries. */
const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Modify devictree settings during ramstage. */
void variant_devtree_update(void);

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@ -72,9 +72,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -30,9 +30,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -37,9 +37,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/gpio.h>
#include <variant/gpio.h>
@ -27,15 +25,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* The next set of functions return the gpio table and fill in the number of
* entries for each table. */
@ -23,8 +22,6 @@ extern const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle;
const struct lpddr4_cfg *variant_lpddr4_config(void);
/* Return memory SKU for the board. */
size_t variant_memory_sku(void);
/* Return ChromeOS gpio table and fill in number of entries. */
const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Seed the NHLT tables with the board specific information. */
struct nhlt;

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@ -51,9 +51,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <variant/gpio.h>
@ -31,15 +29,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -5,7 +5,6 @@
#include <soc/gpio.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/chromeos.h>
/*
* The next set of functions return the gpio table and fill in the number of
@ -20,7 +19,6 @@ const struct pad_config *variant_early_gpio_table(size_t *num);
*/
const struct pad_config *variant_romstage_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Config gpio by different sku id */
const struct pad_config *variant_sku_gpio_table(size_t *num);

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@ -43,9 +43,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(0x2006, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -1,11 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/gpio.h>
#include <variant/gpio.h>
@ -27,15 +25,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Return the sku id based off the strapping resistors attached to SoC. */
uint8_t sku_strapping_value(void);
@ -29,9 +28,6 @@ uint8_t variant_board_sku(void);
/* Set variant board sku to ec by sku id */
void variant_board_ec_set_skuid(void);
/* Return ChromeOS gpio table and fill in number of entries. */
const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Seed the NHLT tables with the board specific information. */
struct nhlt;
void variant_nhlt_oem_overrides(const char **oem_id,

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@ -38,15 +38,6 @@ static bool raw_get_recovery_mode_switch(void)
return !gpio_get(GPP_E8);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *cros_gpios;
size_t num_gpios = 0;
cros_gpios = variant_cros_gpios(&num_gpios);
chromeos_acpi_gpio_generate(cros_gpios, num_gpios);
}
int get_recovery_mode_switch(void)
{

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@ -15,7 +15,4 @@
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
struct cros_gpio;
const struct cros_gpio *variant_cros_gpios(size_t *num);
#endif

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@ -15,7 +15,4 @@
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
struct cros_gpio;
const struct cros_gpio *variant_cros_gpios(size_t *num);
#endif

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@ -20,7 +20,8 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}

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@ -28,9 +28,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -79,7 +79,8 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}

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@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <variant/gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -26,15 +24,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stddef.h>
#include <vendorcode/google/chromeos/chromeos.h>
/*
* The next set of functions return the gpio table and fill in the number of
@ -17,8 +16,6 @@ const struct pad_config *variant_early_gpio_table(size_t *num);
const struct pad_config *variant_sleep_gpio_table(u8 slp_typ, size_t *num);
const struct pad_config *variant_override_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
const struct mb_cfg *variant_memory_params(void);
int variant_memory_sku(void);
void memcfg_variant_init(FSPM_UPD *mupd);

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@ -29,9 +29,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -42,15 +40,6 @@ int get_write_protect_state(void)
return 0;
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
#if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC) ||\
CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC))
int get_ec_is_trusted(void)

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@ -2,6 +2,8 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {

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@ -3,6 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
static const struct pad_config gpio_table[] = {

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@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/chromeos.h>
enum adl_boardid {
/* ADL-P LPDDR4 RVPs */
@ -28,9 +27,6 @@ enum adl_boardid {
ADL_N_LP5 = 0x7,
};
/* The next set of functions return the gpio table and fill in the number of
* entries for each table. */
const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Functions to configure GPIO as per variant schematics */
void variant_configure_gpio_pads(void);
void variant_configure_early_gpio_pads(void);

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@ -47,7 +47,8 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}

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@ -1,13 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -35,12 +33,3 @@ int get_write_protect_state(void)
/* No write protect */
return 0;
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}

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@ -5,7 +5,6 @@
#include <soc/cnl_memcfg_init.h>
#include <soc/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* The next set of functions return the gpio table and fill in the number of
* entries for each table. */
@ -13,8 +12,6 @@
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Return memory configuration structure. */
const struct cnl_mb_cfg *variant_memcfg_config(void);

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@ -44,7 +44,8 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}

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@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/gpio.h>
#include <variant/gpio.h>
@ -26,15 +24,6 @@ int get_write_protect_state(void)
return 0;
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int __weak get_lid_switch(void)
{
return -1;

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@ -5,7 +5,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <vendorcode/google/chromeos/chromeos.h>
/**
* variant_board_id() - Get the board id for the current board variant
@ -27,9 +26,6 @@ const struct lpddr4_cfg *variant_lpddr4_config(void);
/* Return memory SKU for the board. */
size_t variant_memory_sku(void);
/* Return ChromeOS gpio table and fill in number of entries. */
const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Seed the NHLT tables with the board specific information. */
struct nhlt;
void variant_nhlt_init(struct nhlt *nhlt);

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@ -2,12 +2,10 @@
#include <acpi/acpi.h>
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -35,12 +33,3 @@ int get_write_protect_state(void)
/* No write protect */
return 0;
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}

View File

@ -4,13 +4,11 @@
#define __BASEBOARD_VARIANTS_H__
#include <soc/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* The next set of functions return the gpio table and fill in the number of
* entries for each table. */
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
#endif /*__BASEBOARD_VARIANTS_H__ */

View File

@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -37,12 +35,3 @@ int get_write_protect_state(void)
/* No write protect */
return 0;
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}

View File

@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/chromeos.h>
enum jsl_board_id {
jsl_ddr4 = 1,
@ -18,7 +17,6 @@ enum jsl_board_id {
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
const struct mb_cfg *variant_memcfg_config(uint8_t board_id);
#endif /*__BASEBOARD_VARIANTS_H__ */

View File

@ -60,9 +60,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -31,9 +31,10 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
int get_ec_is_trusted(void)

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@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -26,15 +24,6 @@ int get_write_protect_state(void)
return gpio_get(GPIO_PCH_WP);
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */

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@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stddef.h>
#include <vendorcode/google/chromeos/chromeos.h>
/*
* The next set of functions return the gpio table and fill in the number of
@ -14,7 +13,6 @@
*/
const struct pad_config *variant_base_gpio_table(size_t *num);
const struct pad_config *variant_override_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
void variant_configure_early_gpio_pads(void);

View File

@ -38,7 +38,8 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(0x10013, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}

View File

@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@ -39,15 +37,6 @@ int get_write_protect_state(void)
return 0;
}
void mainboard_chromeos_acpi_generate(void)
{
const struct cros_gpio *gpios;
size_t num;
gpios = variant_cros_gpios(&num);
chromeos_acpi_gpio_generate(gpios, num);
}
int get_ec_is_trusted(void)
{
/* Do not have a Chrome EC involved in entering recovery mode;

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@ -5,14 +5,12 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* The next set of functions return the gpio table and fill in the number of
* entries for each table. */
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
size_t variant_memory_sku(void);
const struct mb_cfg *variant_memory_params(void);

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@ -36,7 +36,8 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}

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@ -90,7 +90,8 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}

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@ -83,7 +83,8 @@ static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
};
void mainboard_chromeos_acpi_generate(void)
const struct cros_gpio *variant_cros_gpios(size_t *num)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}

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@ -6,11 +6,16 @@
#endif
#include "chromeos.h"
void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num)
void chromeos_acpi_gpio_generate(void)
{
size_t i;
const struct cros_gpio *gpios;
size_t i, num;
int gpio_num;
gpios = variant_cros_gpios(&num);
if (!gpios)
return;
acpigen_write_scope("\\");
acpigen_write_name("OIPG");

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@ -37,17 +37,10 @@ void chromeos_init_chromeos_acpi(void);
*/
enum cb_err get_dsm_calibration_from_key(const char *key, uint64_t *value);
/*
* Create the OIPG package containing the Chrome OS gpios described by
* the chromeos_gpio array.
*/
struct cros_gpio;
void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num);
/*
* Declaration for mainboards to use to generate ACPI-specific Chrome OS needs.
*/
void mainboard_chromeos_acpi_generate(void);
void chromeos_acpi_gpio_generate(void);
enum {
CROS_GPIO_REC = 1, /* Recovery */
@ -104,4 +97,6 @@ struct cros_gpio {
#define CROS_GPIO_PE_AH(num, dev) \
CROS_GPIO_PE_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
const struct cros_gpio *variant_cros_gpios(size_t *num);
#endif /* __CHROMEOS_H__ */

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@ -98,6 +98,5 @@ void acpi_fill_cnvs(void)
acpigen_write_opregion(&cnvs_op);
acpigen_pop_len();
/* Usually this creates OIPG package for GPIOs. */
mainboard_chromeos_acpi_generate();
chromeos_acpi_gpio_generate();
}