soc/skylake: Write the P2SB IBDF and HBDF registers in coreboot

Do it in coreboot code instead of letting FSP do it.

Change-Id: Ic5e8a62141608463ade398432253bad460a9a79d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35170
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons
2019-08-30 20:05:33 +02:00
committed by Patrick Georgi
parent 941796a50d
commit 4ff63d3a11
4 changed files with 13 additions and 11 deletions

View File

@ -391,17 +391,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Set TccActivationOffset */
tconfig->TccActivationOffset = config->tcc_offset;
/* Already handled in coreboot code, so tell FSP to ignore UPDs */
params->PchIoApicBdfValid = 0;
/* Enable VT-d and X2APIC */
if (!config->ignore_vtd && soc_is_vtd_capable()) {
params->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS;
params->VtdBaseAddress[1] = VTVC0_BASE_ADDRESS;
params->X2ApicOptOut = 0;
tconfig->VtdDisable = 0;
params->PchIoApicBdfValid = 1;
params->PchIoApicBusNumber = V_P2SB_IBDF_BUS;
params->PchIoApicDeviceNumber = V_P2SB_IBDF_DEV;
params->PchIoApicFunctionNumber = V_P2SB_IBDF_FUN;
}
dev = pcidev_path_on_root(SA_DEVFN_IGD);