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soc/intel/alderlake: Make use of is_devfn_enabled() function

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1. Replace all pcidev_path_on_root() and is_dev_enabled() functions
combination with is_devfn_enabled().
2. Remove unused local variable of device structure type
(struct device *).
3. Replace pcidev_path_on_root() and dev->enabled check with
is_devfn_enabled() call.

TEST=Able to build and boot without any regression seen on ADL.

Change-Id: I92671992ec14fd2adca1635b0791ac8b456332e9
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55292
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik
2021-06-09 04:14:50 +05:30
parent 5b81b88902
commit 50134eccbd
3 changed files with 25 additions and 59 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
src/soc/intel/alderlake/fsp_params.c
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@@ -102,8 +102,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->GraphicsConfigPtr = (uintptr_t)vbt_get();
/* Check if IGD is present and fill Graphics init param accordingly */
dev = pcidev_path_on_root(SA_DEVFN_IGD);
params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev);
params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(SA_DEVFN_IGD);
params->LidStatus = CONFIG(RUN_FSP_GOP);
/* Use coreboot MP PPI services if Kconfig is enabled */
@@ -195,8 +194,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->SerialIoUartAutoFlow[CONFIG_UART_FOR_CONSOLE] = 0;
/* SATA */
dev = pcidev_path_on_root(PCH_DEVFN_SATA);
params->SataEnable = is_dev_enabled(dev);
params->SataEnable = is_devfn_enabled(PCH_DEVFN_SATA);
if (params->SataEnable) {
params->SataMode = config->SataMode;
params->SataSalpSupport = config->SataSalpSupport;
@@ -229,19 +227,16 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
}
/* Enable TCPU for processor thermal control */
dev = pcidev_path_on_root(SA_DEVFN_DPTF);
params->Device4Enable = is_dev_enabled(dev);
params->Device4Enable = is_devfn_enabled(SA_DEVFN_DPTF);
/* Set TccActivationOffset */
params->TccActivationOffset = config->tcc_offset;
/* LAN */
dev = pcidev_path_on_root(PCH_DEVFN_GBE);
params->PchLanEnable = is_dev_enabled(dev);
params->PchLanEnable = is_devfn_enabled(PCH_DEVFN_GBE);
/* CNVi */
dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI);
params->CnviMode = is_dev_enabled(dev);
params->CnviMode = is_devfn_enabled(PCH_DEVFN_CNVI_WIFI);
params->CnviBtCore = config->CnviBtCore;
params->CnviBtAudioOffload = config->CnviBtAudioOffload;
/* Assert if CNVi BT is enabled without CNVi being enabled. */
@@ -250,15 +245,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
assert(params->CnviBtCore || !params->CnviBtAudioOffload);
/* VMD */
dev = pcidev_path_on_root(SA_DEVFN_VMD);
params->VmdEnable = is_dev_enabled(dev);
params->VmdEnable = is_devfn_enabled(SA_DEVFN_VMD);
/* THC */
dev = pcidev_path_on_root(PCH_DEVFN_THC0);
params->ThcPort0Assignment = is_dev_enabled(dev) ? THC_0 : THC_NONE;
dev = pcidev_path_on_root(PCH_DEVFN_THC1);
params->ThcPort1Assignment = is_dev_enabled(dev) ? THC_1 : THC_NONE;
params->ThcPort0Assignment = is_devfn_enabled(PCH_DEVFN_THC0) ? THC_0 : THC_NONE;
params->ThcPort1Assignment = is_devfn_enabled(PCH_DEVFN_THC1) ? THC_1 : THC_NONE;
/* Legacy 8254 timer support */
params->Enable8254ClockGating = !CONFIG(USE_LEGACY_8254_TIMER);