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ec: Use EC_ENABLE_LID_SWITCH for all mainboards with LID using chromeec

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Instead of defining a separate LID device for mainboards using
chromeec, define EC_ENABLE_LID_SWITCH for these boards.

Change-Id: Iac58847c2055fa27c19d02b2dbda6813d6dec3ec
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18964
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh
2017-03-23 23:41:53 -07:00
committed by Martin Roth
parent 3795b03b69
commit 5029a1668e
25 changed files with 57 additions and 144 deletions
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4
src/mainboard/intel/kunimitsu/acpi/ec.asl
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@@ -23,5 +23,9 @@
/* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
/* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl>

13
src/mainboard/intel/kunimitsu/acpi/mainboard.asl
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@@ -14,21 +14,8 @@
* GNU General Public License for more details.
*/
#include "../gpio.h"
Scope (\_SB)
{
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Method (_LID, 0)
{
Return (\_SB.PCI0.LPCB.EC0.LIDS)
}
Name (_PRW, Package () { GPE_EC_WAKE, 5 })
}
Device (PWRB)
{
Name (_HID, EisaId ("PNP0C0C"))