ec: Use EC_ENABLE_LID_SWITCH for all mainboards with LID using chromeec

Instead of defining a separate LID device for mainboards using
chromeec, define EC_ENABLE_LID_SWITCH for these boards.

Change-Id: Iac58847c2055fa27c19d02b2dbda6813d6dec3ec
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18964
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh
2017-03-23 23:41:53 -07:00
committed by Martin Roth
parent 3795b03b69
commit 5029a1668e
25 changed files with 57 additions and 144 deletions

View File

@@ -26,9 +26,6 @@ External (\_SB.DPTF.TEVT, MethodObj)
External (\_SB.DPTF.TCHG, DeviceObj) External (\_SB.DPTF.TCHG, DeviceObj)
#endif #endif
External (\_SB.DPTF.TPET, MethodObj) External (\_SB.DPTF.TPET, MethodObj)
#ifndef EC_ENABLE_LID_SWITCH
External (\_SB.LID0, DeviceObj)
#endif
Device (EC0) Device (EC0)
{ {
@@ -171,10 +168,6 @@ Device (EC0)
Store (LIDS, \LIDS) Store (LIDS, \LIDS)
#ifdef EC_ENABLE_LID_SWITCH #ifdef EC_ENABLE_LID_SWITCH
Notify (LID0, 0x80) Notify (LID0, 0x80)
#else
If (CondRefOf (\_SB.LID0)) {
Notify (\_SB.LID0, 0x80)
}
#endif #endif
} }
@@ -185,10 +178,6 @@ Device (EC0)
Store (LIDS, \LIDS) Store (LIDS, \LIDS)
#ifdef EC_ENABLE_LID_SWITCH #ifdef EC_ENABLE_LID_SWITCH
Notify (LID0, 0x80) Notify (LID0, 0x80)
#else
If (CondRefOf (\_SB.LID0)) {
Notify (\_SB.LID0, 0x80)
}
#endif #endif
} }

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@@ -19,5 +19,13 @@
/* variant configuration */ /* variant configuration */
#include <variant/acpi/ec.asl> #include <variant/acpi/ec.asl>
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
/*
* There is no GPIO for LID, the EC pulses WAKE# pin instead.
* There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE.
*/
#define EC_ENABLE_WAKE_PIN 0x69
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -18,20 +18,6 @@
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
// There is no GPIO for LID, the EC pulses WAKE# pin instead.
// There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
}
Device (PWRB) Device (PWRB)
{ {
Name(_HID, EisaId("PNP0C0C")) Name(_HID, EisaId("PNP0C0C"))

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@@ -23,5 +23,9 @@
/* Enable EC backed PD MCU device in ACPI */ /* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE #define EC_ENABLE_PD_MCU_DEVICE
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -17,17 +17,6 @@
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Method (_LID, 0)
{
Return (\_SB.PCI0.LPCB.EC0.LIDS)
}
Name (_PRW, Package () { GPE_EC_WAKE, 5 })
}
Device (PWRB) Device (PWRB)
{ {
Name (_HID, EisaId ("PNP0C0C")) Name (_HID, EisaId ("PNP0C0C"))

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@@ -17,5 +17,8 @@
/* mainboard configuration */ /* mainboard configuration */
#include <ec.h> #include <ec.h>
/* Enable LID switch */
#define EC_ENABLE_LID_SWITCH
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -19,16 +19,6 @@
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Method (_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
}
Device (PWRB) Device (PWRB)
{ {
Name (_HID, EisaId ("PNP0C0C")) Name (_HID, EisaId ("PNP0C0C"))

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@@ -26,5 +26,9 @@
/* Enable EC backed PD MCU device in ACPI */ /* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE #define EC_ENABLE_PD_MCU_DEVICE
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -17,17 +17,6 @@
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Method (_LID, 0)
{
Return (\_SB.PCI0.LPCB.EC0.LIDS)
}
Name (_PRW, Package () { GPE_EC_WAKE, 5 })
}
Device (PWRB) Device (PWRB)
{ {
Name (_HID, EisaId ("PNP0C0C")) Name (_HID, EisaId ("PNP0C0C"))

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@@ -26,5 +26,9 @@
/* Enable EC backed PD MCU device in ACPI */ /* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE #define EC_ENABLE_PD_MCU_DEVICE
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -18,17 +18,6 @@
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Method (_LID, 0)
{
Return (\_SB.PCI0.LPCB.EC0.LIDS)
}
Name (_PRW, Package () { GPE_EC_WAKE, 5 })
}
Device (PWRB) Device (PWRB)
{ {
Name (_HID, EisaId ("PNP0C0C")) Name (_HID, EisaId ("PNP0C0C"))

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@@ -19,5 +19,11 @@
/* Enable EC backed Keyboard Backlight in ACPI */ /* Enable EC backed Keyboard Backlight in ACPI */
#define EC_ENABLE_KEYBOARD_BACKLIGHT #define EC_ENABLE_KEYBOARD_BACKLIGHT
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
/* EC_LID_OUT is GPIO15 */
#define EC_ENABLE_WAKE_PIN 0x1f
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -17,19 +17,6 @@
#include <mainboard/google/link/onboard.h> #include <mainboard/google/link/onboard.h>
Scope (\_SB) { Scope (\_SB) {
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
// EC_LID_OUT is GPIO15
Name(_PRW, Package(){0x1f, 0x05})
}
Device (PWRB) Device (PWRB)
{ {
Name(_HID, EisaId("PNP0C0C")) Name(_HID, EisaId("PNP0C0C"))

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@@ -38,7 +38,7 @@ Method(_WAK,1)
Store (\_SB.PCI0.LPCB.EC0.LIDS, Local0) Store (\_SB.PCI0.LPCB.EC0.LIDS, Local0)
if (LNotEqual (Local0, \LIDS)) { if (LNotEqual (Local0, \LIDS)) {
Store (Local0, \LIDS) Store (Local0, \LIDS)
Notify (\_SB.LID0, 0x80) Notify (\_SB.PCI0.LPCB.EC0.LID0, 0x80)
} }
Return(Package(){0,0}) Return(Package(){0,0})

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@@ -16,5 +16,11 @@
/* mainboard configuration */ /* mainboard configuration */
#include <mainboard/google/rambi/ec.h> #include <mainboard/google/rambi/ec.h>
#include <variant/onboard.h>
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
#define EC_ENABLE_WAKE_PIN BOARD_PCH_WAKE_GPIO
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -18,17 +18,6 @@
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Name (_PRW, Package() { BOARD_PCH_WAKE_GPIO, 0x5 })
Method (_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
}
Device (PWRB) Device (PWRB)
{ {
Name (_HID, EisaId ("PNP0C0C")) Name (_HID, EisaId ("PNP0C0C"))

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@@ -16,5 +16,13 @@
/* mainboard configuration */ /* mainboard configuration */
#include "../ec.h" #include "../ec.h"
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
/*
* There is no GPIO for LID, the EC pulses WAKE# pin instead.
* There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE.
*/
#define EC_ENABLE_WAKE_PIN 0x69
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -16,20 +16,6 @@
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
// There is no GPIO for LID, the EC pulses WAKE# pin instead.
// There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
}
Device (PWRB) Device (PWRB)
{ {
Name(_HID, EisaId("PNP0C0C")) Name(_HID, EisaId("PNP0C0C"))

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@@ -75,7 +75,7 @@ Method(_WAK,1)
Store (\_SB.PCI0.LPCB.EC0.LIDS, Local0) Store (\_SB.PCI0.LPCB.EC0.LIDS, Local0)
if (LNotEqual (Local0, \LIDS)) { if (LNotEqual (Local0, \LIDS)) {
Store (Local0, \LIDS) Store (Local0, \LIDS)
Notify (\_SB.LID0, 0x80) Notify (\_SB.PCI0.LPCB.EC0.LID0, 0x80)
} }
Return(Package(){0,0}) Return(Package(){0,0})

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@@ -23,6 +23,11 @@
/* Enable EC backed PD MCU device in ACPI */ /* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE #define EC_ENABLE_PD_MCU_DEVICE
#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>
#endif #endif

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@@ -14,22 +14,9 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <variant/gpio.h>
#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Method (_LID, 0)
{
Return (\_SB.PCI0.LPCB.EC0.LIDS)
}
Name (_PRW, Package () { GPE_EC_WAKE, 5 })
}
Device (PWRB) Device (PWRB)
{ {
Name (_HID, EisaId ("PNP0C0C")) Name (_HID, EisaId ("PNP0C0C"))

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@@ -23,5 +23,9 @@
/* Enable EC backed PD MCU device in ACPI */ /* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE #define EC_ENABLE_PD_MCU_DEVICE
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -14,21 +14,8 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include "../gpio.h"
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Method (_LID, 0)
{
Return (\_SB.PCI0.LPCB.EC0.LIDS)
}
Name (_PRW, Package () { GPE_EC_WAKE, 5 })
}
Device (PWRB) Device (PWRB)
{ {
Name (_HID, EisaId ("PNP0C0C")) Name (_HID, EisaId ("PNP0C0C"))

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@@ -17,5 +17,8 @@
/* mainboard configuration */ /* mainboard configuration */
#include "ec.h" #include "ec.h"
/* Enable LID switch */
#define EC_ENABLE_LID_SWITCH
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>

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@@ -19,16 +19,6 @@
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D"))
Method (_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
}
Device (PWRB) Device (PWRB)
{ {
Name (_HID, EisaId ("PNP0C0C")) Name (_HID, EisaId ("PNP0C0C"))