From 502a761221ed14c4b381fe33350c9f9d17ec0d76 Mon Sep 17 00:00:00 2001 From: Robert Chen Date: Mon, 3 Jan 2022 09:23:58 +0800 Subject: [PATCH] mb/google/brya/var/vell: Enable SaGv Enable SaGv support for vell BUG=b:208719081 TEST=FW_NAME=vell emerge-brya coreboot Change-Id: I01e3da449e2cf53278f625ca265d09f7a1869ef7 Signed-off-by: Robert Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/60811 Tested-by: build bot (Jenkins) Reviewed-by: Nick Vaccaro --- src/mainboard/google/brya/variants/vell/memory.c | 3 ++- src/mainboard/google/brya/variants/vell/overridetree.cb | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/vell/memory.c b/src/mainboard/google/brya/variants/vell/memory.c index afbe114f1c..01e0afddd8 100644 --- a/src/mainboard/google/brya/variants/vell/memory.c +++ b/src/mainboard/google/brya/variants/vell/memory.c @@ -65,7 +65,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, - .ect = true, /* Enable Early Command Training */ + .ect = false, /* Early Command Training */ + .UserBd = BOARD_TYPE_ULT_ULX_T4, .lp5x_config = { .ccc_config = 0xff, diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index fff53b6972..fe929b5fd3 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -32,6 +32,7 @@ chip soc/intel/alderlake register "gpio_pm[COMM_3]" = "0" register "gpio_pm[COMM_4]" = "0" register "gpio_pm[COMM_5]" = "0" + register "SaGv" = "SaGv_Enabled" # Intel Common SoC Config #+-------------------+---------------------------+