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soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c

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Commit 2c26108208 moved this function to
pmutil.c for Tiger Lake. Do this to all other platforms for consistency.
For Skylake, __SIMPLE_DEVICE__ preprocessor guards are no longer needed.

With this change, pmc.c is only needed in ramstage. Adjust Makefile.inc
accordingly, and drop ENV_RAMSTAGE guards from Skylake.

Change-Id: I424eb359c898f155659d085b888410b6bb58b9ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Angel Pons
2021-04-17 13:02:37 +02:00
committed by Patrick Georgi
parent f643b63c4d
commit 505e383ccb
18 changed files with 98 additions and 112 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/soc/intel/skylake/Makefile.inc
View File

@@ -32,7 +32,6 @@ romstage-y += gpio.c
romstage-y += gspi.c
romstage-y += i2c.c
romstage-y += me.c
romstage-y += pmc.c
romstage-y += pmutil.c
romstage-y += reset.c
romstage-y += spi.c
@@ -66,7 +65,6 @@ ramstage-y += xhci.c
smm-y += elog.c
smm-y += gpio.c
smm-y += p2sb.c
smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += uart.c

24
src/soc/intel/skylake/pmc.c
View File

@@ -14,28 +14,6 @@
#include "chip.h"
/*
* Set which power state system will be after reapplying
* the power (from G3 State)
*/
void pmc_soc_set_afterg3_en(const bool on)
{
uint8_t reg8;
#if defined(__SIMPLE_DEVICE__)
const pci_devfn_t dev = PCH_DEV_PMC;
#else
const struct device *const dev = PCH_DEV_PMC;
#endif
reg8 = pci_read_config8(dev, GEN_PMCON_B);
if (on)
reg8 &= ~SLEEP_AFTER_POWER_FAIL;
else
reg8 |= SLEEP_AFTER_POWER_FAIL;
pci_write_config8(dev, GEN_PMCON_B, reg8);
}
#if ENV_RAMSTAGE
/* Fill up PMC resource structure */
int pmc_soc_get_resources(struct pmc_resource_config *cfg)
{
@@ -166,5 +144,3 @@ static void pm1_handle_wake_pin(void *unused)
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_handle_wake_pin, NULL);
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_EXIT, pm1_handle_wake_pin, NULL);
#endif

17
src/soc/intel/skylake/pmutil.c
View File

@@ -248,3 +248,20 @@ uint16_t get_pmbase(void)
{
return ACPI_BASE_ADDRESS;
}
/*
* Set which power state system will be after reapplying
* the power (from G3 State)
*/
void pmc_soc_set_afterg3_en(const bool on)
{
uint8_t reg8;
const pci_devfn_t dev = PCH_DEV_PMC;
reg8 = pci_read_config8(dev, GEN_PMCON_B);
if (on)
reg8 &= ~SLEEP_AFTER_POWER_FAIL;
else
reg8 |= SLEEP_AFTER_POWER_FAIL;
pci_write_config8(dev, GEN_PMCON_B, reg8);
}