mb/google/hatch: update SD card detect GPIO
SD_CD# in Cannonlake PCH is also wired to an internal virtual GPIO, expose that GPIO for kernel to configure card detect IRQ. BUG=b:123350329 Change-Id: I566cc2eb11dc257366897a1efba905b8ddcf493d Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/c/31553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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committed by
Patrick Georgi
parent
ce529b6318
commit
51749b2766
@@ -89,7 +89,7 @@ chip soc/intel/cannonlake
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register "PcieClkSrcClkReq[1]" = "1"
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register "PcieClkSrcClkReq[1]" = "1"
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# GPIO for SD card detect
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# GPIO for SD card detect
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register "sdcard_cd_gpio" = "GPP_G5"
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register "sdcard_cd_gpio" = "vSD3_CD_B"
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# PCIe port 14 for M.2 E-key WLAN
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# PCIe port 14 for M.2 E-key WLAN
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register "PcieRpEnable[13]" = "1"
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register "PcieRpEnable[13]" = "1"
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@@ -178,6 +178,8 @@ static const struct pad_config gpio_table[] = {
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PAD_NC(GPP_H10, NONE),
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PAD_NC(GPP_H10, NONE),
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/* PCH_I2C_TRACKPAD_SCL */
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/* PCH_I2C_TRACKPAD_SCL */
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PAD_NC(GPP_H11, NONE),
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PAD_NC(GPP_H11, NONE),
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/* SD card detect VGPIO */
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PAD_CFG_GPI_GPIO_DRIVER(vSD3_CD_B, NONE, DEEP),
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/* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_OD */
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/* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_OD */
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PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
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