inteltool: Start adding Bay Trail
- Add silvermont (Bay Trail core) MSRs - these are shared with rangeley/avoton. - Add GPIO values and GPIO muxing information. - Add Bay Trail to the PM list. Still to do: - Northbridge functionality (RCBA, Memory timings, etc.) - Add Graphics registers Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7711 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@@ -705,6 +705,7 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
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case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL:
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case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM:
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case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE:
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case PCI_DEVICE_ID_INTEL_BAYTRAIL_LPC:
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pmbase = pci_read_word(sb, 0x40) & 0xff80;
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pm_registers = pch_pm_registers;
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size = ARRAY_SIZE(pch_pm_registers);
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