inteltool: Start adding Bay Trail

- Add silvermont (Bay Trail core) MSRs - these are shared with
rangeley/avoton.
- Add GPIO values and GPIO muxing information.
- Add Bay Trail to the PM list.

Still to do:
- Northbridge functionality (RCBA, Memory timings, etc.)
- Add Graphics registers

Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Martin Roth
2014-12-07 22:11:54 -07:00
committed by Martin Roth
parent cdb61a6f5d
commit 51dde6fe3b
5 changed files with 540 additions and 0 deletions

View File

@@ -705,6 +705,7 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL:
case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM:
case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE:
case PCI_DEVICE_ID_INTEL_BAYTRAIL_LPC:
pmbase = pci_read_word(sb, 0x40) & 0xff80;
pm_registers = pch_pm_registers;
size = ARRAY_SIZE(pch_pm_registers);