ARM: Generalize armv7 as arm.

There are ARM systems which are essentially heterogeneous multicores where
some cores implement a different ARM architecture version than other cores. A
specific example is the tegra124 which boots on an ARMv4 coprocessor while
most code, including most of the firmware, runs on the main ARMv7 core. To
support SOCs like this, the plan is to generalize the ARM architecture so that
all versions are available, and an SOC/CPU can then select what architecture
variant should be used for each component of the firmware; bootblock,
romstage, and ramstage.

Old-Change-Id: I22e048c3bc72bd56371e14200942e436c1e312c2
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/171338
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 8423a41529da0ff67fb9873be1e2beb30b09ae2d)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>

ARM: Split out ARMv7 code and make it possible to have other arch versions.

We don't always want to use ARMv7 code when building for ARM, so we should
separate out the ARMv7 code so it can be excluded, and also make it possible
to include code for some other version of the architecture instead, all per
build component for cases where we need more than one architecture version
at a time.

The tegra124 bootblock will ultimately need to be ARMv4, but until we have
some ARMv4 code to switch over to we can leave it set to ARMv7.

Old-Change-Id: Ia982c91057fac9c252397b7c866224f103761cc7
Reviewed-on: https://chromium-review.googlesource.com/171400
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 799514e6060aa97acdcf081b5c48f965be134483)

Squashed two related patches for splitting ARM support into general
ARM support and ARMv7 specific pieces.

Change-Id: Ic6511507953a2223c87c55f90252c4a4e1dd6010
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6782
Tested-by: build bot (Jenkins)

payloads/libpayload/Config.in

@@ -67,10 +67,10 @@ choice
         prompt "Target Architecture"
         default ARCH_X86
 
-config ARCH_ARMV7
-        bool "ARMv7"
+config ARCH_ARM
+        bool "ARM"
         help
-          Support the x86 architecture
+          Support the ARM architecture
 
 config ARCH_X86
         bool "x86"

payloads/libpayload/Makefile

@@ -91,14 +91,14 @@ include util/kconfig/Makefile
 
 include $(HAVE_DOTCONFIG)
 
-ARCHDIR-$(CONFIG_LP_ARCH_ARMV7)   := armv7
+ARCHDIR-$(CONFIG_LP_ARCH_ARM)     := arm
 ARCHDIR-$(CONFIG_LP_ARCH_X86)     := x86
 
 ARCH-y := $(ARCHDIR-y)
 
 # If architecture folder name is different from GCC binutils architecture name,
 # override here.
-ARCH-$(CONFIG_LP_ARCH_ARMV7)   := armv7
+ARCH-$(CONFIG_LP_ARCH_ARM)     := arm
 ARCH-$(CONFIG_LP_ARCH_X86)     := i386
 
 CC := $(CC_$(ARCH-y))

payloads/libpayload/Makefile.inc

@@ -31,7 +31,7 @@
 
 export KERNELVERSION      := 0.2.0
 
-ARCHDIR-$(CONFIG_LP_ARCH_ARMV7)   := armv7
+ARCHDIR-$(CONFIG_LP_ARCH_ARM)     := arm
 ARCHDIR-$(CONFIG_LP_ARCH_X86)     := x86
 DESTDIR ?= install
 

payloads/libpayload/arch/Config.in

@@ -27,5 +27,5 @@
 ## SUCH DAMAGE.
 ##
 
-source "arch/armv7/Config.in"
+source "arch/arm/Config.in"
 source "arch/x86/Config.in"

payloads/libpayload/arch/arm/Config.in

@@ -27,7 +27,7 @@
 ## SUCH DAMAGE.
 ##
 
-if ARCH_ARMV7
+if ARCH_ARM
 
 config ARCH_SPECIFIC_OPTIONS # dummy
 	def_bool y

payloads/libpayload/arch/arm/cache.c

@@ -267,7 +267,6 @@ void dcache_mmu_disable(void)
 	write_sctlr(sctlr);
 }
 
-
 void dcache_mmu_enable(void)
 {
 	uint32_t sctlr;
@@ -278,7 +277,7 @@ void dcache_mmu_enable(void)
 	write_sctlr(sctlr);
 }
 
-void armv7_invalidate_caches(void)
+void arm_invalidate_caches(void)
 {
 	uint32_t clidr;
 	int level;

payloads/libpayload/arch/arm/timer.c

@@ -28,8 +28,8 @@
  */
 
 /**
- * @file armv7/timer.c
- * ARMv7 specific timer routines
+ * @file arm/timer.c
+ * ARM specific timer routines
  */
 
 #include <libpayload.h>

payloads/libpayload/bin/lpgcc

@@ -68,11 +68,11 @@ else
 	exit 1
 fi
 
-if [ "$CONFIG_LP_ARCH_ARMV7" = "y" ]; then
-  _ARCHINCDIR=$_INCDIR/armv7
-  _ARCHLIBDIR=$_LIBDIR/armv7
+if [ "$CONFIG_LP_ARCH_ARM" = "y" ]; then
+  _ARCHINCDIR=$_INCDIR/arm
+  _ARCHLIBDIR=$_LIBDIR/arm
   _ARCHEXTRA=""
-  _ARCH=armv7
+  _ARCH=arm
 fi
 
 if [ "$CONFIG_LP_ARCH_X86" = "y" ]; then

payloads/libpayload/configs/config.panther

@@ -15,7 +15,7 @@ CONFIG_LP_CHROMEOS=y
 #
 # Architecture Options
 #
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
 # CONFIG_LP_ARCH_POWERPC is not set
 CONFIG_LP_ARCH_X86=y
 # CONFIG_LP_MEMMAP_RAM_ONLY is not set

payloads/libpayload/configs/defconfig

@@ -15,7 +15,7 @@
 #
 # Architecture Options
 #
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
 CONFIG_LP_ARCH_X86=y
 # CONFIG_LP_MEMMAP_RAM_ONLY is not set
 # CONFIG_LP_MULTIBOOT is not set

payloads/libpayload/configs/defconfig-arm

@@ -15,7 +15,7 @@
 #
 # Architecture Options
 #
-CONFIG_LP_ARCH_ARMV7=y
+CONFIG_LP_ARCH_ARM=y
 # CONFIG_LP_ARCH_X86 is not set
 # CONFIG_LP_MEMMAP_RAM_ONLY is not set
 
@@ -35,6 +35,7 @@ CONFIG_LP_LZMA=y
 # CONFIG_LP_SKIP_CONSOLE_INIT is not set
 CONFIG_LP_CBMEM_CONSOLE=y
 CONFIG_LP_SERIAL_CONSOLE=y
+# CONFIG_LP_8250_SERIAL_CONSOLE is not set
 # CONFIG_LP_SERIAL_SET_SPEED is not set
 # CONFIG_LP_SERIAL_ACS_FALLBACK is not set
 CONFIG_LP_VIDEO_CONSOLE=y
@@ -60,10 +61,6 @@ CONFIG_LP_USB_HUB=y
 CONFIG_LP_USB_MSC=y
 CONFIG_LP_USB_GEN_HUB=y
 # CONFIG_LP_USB_PCI is not set
-CONFIG_LP_USB_MEMORY=y
-CONFIG_LP_USB_OHCI_BASE_ADDRESS=0x12120000
-CONFIG_LP_USB_EHCI_BASE_ADDRESS=0x12110000
-CONFIG_LP_USB_XHCI_BASE_ADDRESS=0x12000000
 # CONFIG_LP_BIG_ENDIAN is not set
 CONFIG_LP_LITTLE_ENDIAN=y
 # CONFIG_LP_IO_ADDRESS_SPACE is not set

payloads/libpayload/include/arm/arch/cache.h

@@ -26,11 +26,11 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * cache.h: Cache maintenance API for ARMv7
+ * cache.h: Cache maintenance API for ARM
  */
 
-#ifndef ARMV7_CACHE_H
-#define ARMV7_CACHE_H
+#ifndef ARM_CACHE_H
+#define ARM_CACHE_H
 
 #include <stddef.h>
 #include <stdint.h>
@@ -320,8 +320,8 @@ void tlb_invalidate_all(void);
  * Generalized setup/init functions
  */
 
-/* invalidate all caches on ARMv7 */
-void armv7_invalidate_caches(void);
+/* invalidate all caches on ARM */
+void arm_invalidate_caches(void);
 
 /* mmu initialization (set page table address, set permissions, etc) */
 void mmu_init(void);
@@ -338,4 +338,4 @@ void mmu_disable_range(unsigned long start_mb, unsigned long size_mb);
 void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
 						enum dcache_policy policy);
 
-#endif /* ARMV7_CACHE_H */
+#endif /* ARM_CACHE_H */

payloads/libpayload/include/cbfs_core.h

@@ -106,7 +106,7 @@ struct cbfs_header {
  */
 #define CBFS_ARCHITECTURE_UNKNOWN  0xFFFFFFFF
 #define CBFS_ARCHITECTURE_X86      0x00000001
-#define CBFS_ARCHITECTURE_ARMV7    0x00000010
+#define CBFS_ARCHITECTURE_ARM      0x00000010
 
 /** This is a component header - every entry in the CBFS
     will have this header.

payloads/libpayload/sample/Makefile

@@ -31,7 +31,7 @@
 include ../.xcompile
 include ../.config
 
-ARCH-$(CONFIG_ARCH_ARMV7)   := armv7
+ARCH-$(CONFIG_ARCH_ARMV)   := arm
 ARCH-$(CONFIG_ARCH_POWERPC) := powerpc
 ARCH-$(CONFIG_ARCH_X86)     := i386
 

payloads/libpayload/util/xcompile/xcompile

@@ -106,7 +106,7 @@ detect_special_flags() {
 		CFLAGS="$CFLAGS -Wl,--build-id=none"
 
 	case "$architecture" in
-		armv7 )
+		arm )
 			# testcc "$CC" "$CFLAGS -mcpu=cortex-a9" &&
 			#	CFLAGS="$CFLAGS -mcpu=cortex-a9"
 			;;
@@ -135,13 +135,13 @@ touch "$TMPFILE"
 trap clean_up EXIT
 
 # Architecture definition
-SUPPORTED_ARCHITECTURE="x86 armv7"
+SUPPORTED_ARCHITECTURE="x86 arm"
 
 # ARM Architecture
-TARCH_armv7="armv7"
-TBFDARCH_armv7="littlearm"
-TCLIST_armv7="armv7a"
-TWIDTH_armv7="32"
+TARCH_arm="arm"
+TBFDARCH_arm="littlearm"
+TCLIST_arm="armv7a"
+TWIDTH_arm="32"
 
 # X86 Architecture
 TARCH_x86="i386"

payloads/tianocoreboot/libpayload.config

@@ -15,7 +15,7 @@
 #
 # Architecture Options
 #
-# CONFIG_ARCH_ARMV7 is not set
+# CONFIG_ARCH_ARM is not set
 # CONFIG_ARCH_POWERPC is not set
 CONFIG_ARCH_X86=y
 # CONFIG_MEMMAP_RAM_ONLY is not set