- Cleanups on the romcc side including a pci interface that uses

fewer registers, and is easier to hardcode.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/k8/earlymtrr.inc

@@ -46,12 +46,12 @@ set_var_mtrr:
 	wrmsr
 
 #if defined(XIP_ROM_SIZE) && defined(XIP_ROM_BASE)
-	/* enable write protect caching so we can do execute in place
+	/* enable write back cachine so we can do execute in place
 	 * on the flash rom.
 	 */
 	movl	$0x202, %ecx
 	xorl	%edx, %edx
-	movl	$(XIP_ROM_BASE | 0x005), %eax
+	movl	$(XIP_ROM_BASE | 0x006), %eax
 	wrmsr	
 
 	movl	$0x203, %ecx

src/cpu/p5/cpuid.c

@@ -1,7 +1,3 @@
-#ifndef lint
-static char rcsid[] = "$Id$";
-#endif
-
 #include <console/console.h>
 #include <cpu/p5/cpuid.h>
 #ifdef i586

src/cpu/p6/mtrr.c

@@ -25,10 +25,6 @@
  * $Id$
  */
 
-#ifndef lint
-static char rcsid[] = "$Id$";
-#endif
-
 #include <console/console.h>
 #include <mem.h>
 #include <cpu/p6/msr.h>
@@ -128,8 +124,6 @@ static void intel_set_var_mtrr(unsigned int reg, unsigned long basek, unsigned l
 /* setting variable mtrr, comes from linux kernel source */
 void set_var_mtrr(unsigned int reg, unsigned long base, unsigned long size, unsigned char type)
 {
-	unsigned int tmp;
-
 	if (reg >= 8)
 		return;