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intel/lynxpoint: xhci: Update magic bits to new magic values

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BUG=chrome-os-partner:22254
BRANCH=falco
TEST=emerge-falco chromeos-coreboot-falco

Original-Change-Id: I493a8cbbfdd958b855f6b4c01e03ee524be74c6e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167050
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 226a66772768bf3c2f69e585984e52c0c270821f)

Change-Id: I800b02b511f9d188dd7a8e8d83139a8181346916
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167312
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/6014
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Duncan Laurie 2013-08-28 09:53:50 -07:00 committed by Patrick Georgi
parent a3119e5835
commit 527b03a4d7
1 changed files with 2 additions and 2 deletions
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4
src/southbridge/intel/lynxpoint/usb_xhci.c
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@ -358,10 +358,10 @@ static void usb_xhci_init(device_t dev)
write32(mem_base + 0x8144, reg32); write32(mem_base + 0x8144, reg32);
if (pch_is_lp()) { if (pch_is_lp()) {
/* XHCIBAR + 816Ch[19:0] = 000f0038h */ /* XHCIBAR + 816Ch[19:0] = 000e0038h */
reg32 = read32(mem_base + 0x816c); reg32 = read32(mem_base + 0x816c);
reg32 &= ~0x000fffff; reg32 &= ~0x000fffff;
reg32 |= 0x000f0038; reg32 |= 0x000e0038;
write32(mem_base + 0x816c, reg32); write32(mem_base + 0x816c, reg32);
/* D20:F0:B0h[17,14,13] = 100b */ /* D20:F0:B0h[17,14,13] = 100b */