diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index 0c042df8b2..f2142d93cc 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -3,6 +3,7 @@
  *
  * Copyright (C) 2014 Google Inc.
  * Copyright (C) 2015-2018 Intel Corporation.
+ * Copyright (C) 2018 Siemens AG
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -140,6 +141,25 @@ void cpu_set_p_state_to_max_non_turbo_ratio(void)
 		((perf_ctl.lo >> 8) & 0xff) * CONFIG_CPU_BCLK_MHZ);
 }
 
+/*
+ * Set PERF_CTL MSR (0x199) P_Req (14:8 bits) with the value
+ * for maximum efficiency. This value is reported in PLATFORM_INFO MSR (0xCE)
+ * in Bits 47:40 and is extracted with cpu_get_min_ratio().
+ */
+void cpu_set_p_state_to_min_clock_ratio(void)
+{
+	uint32_t min_ratio;
+	msr_t perf_ctl;
+
+	/* Read the minimum ratio for the best efficiency. */
+	min_ratio = cpu_get_min_ratio();
+	perf_ctl.lo = (min_ratio << 8) & 0xff00;
+	perf_ctl.hi = 0;
+	wrmsr(IA32_PERF_CTL, perf_ctl);
+	printk(BIOS_DEBUG, "CPU: frequency set to %u MHz\n",
+			    (min_ratio * CONFIG_CPU_BCLK_MHZ));
+}
+
 /*
  * Get the Burst/Turbo Mode State from MSR IA32_MISC_ENABLE 0x1A0
  * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED.
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h
index 88f04b439a..0d51146752 100644
--- a/src/soc/intel/common/block/include/intelblocks/cpulib.h
+++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2017 Intel Corporation.
+ * Copyright (C) 2018 Siemens AG
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -72,6 +73,13 @@ void cpu_set_p_state_to_nominal_tdp_ratio(void);
  */
 void cpu_set_p_state_to_max_non_turbo_ratio(void);
 
+/*
+ * Set PERF_CTL MSR (0x199) P_Req (14:8 bits) with the value
+ * for maximum efficiency. This value is reported in PLATFORM_INFO MSR (0xCE)
+ * in Bits 47:40 and is extracted with cpu_get_min_ratio().
+ */
+void cpu_set_p_state_to_min_clock_ratio(void);
+
 /*
  * Get the Burst/Turbo Mode State from MSR IA32_MISC_ENABLE 0x1A0
  * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED.