cpu/amd/agesa/family15tn: Add initial support for SMM mode

This is the minimal setup needed to be able to execute SMI handlers.
Only support for ASEG handlers is added, which should be sufficient
for Trinity (up to 4 cores).

There are a few hacks which need to be introduced in generic code in
order to make this work properly, but these hacks are self-contained.
They are a not a result of any special needs of this CPU, but rather
from a poorly designed infrastructure. Comments are added to explain
how such code could be refactored in the future.

Change-Id: Iefd4ae17cf0206cae8848cadba3a12cbe3b2f8b6
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5493
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>

src/include/cpu/amd/amdfam15.h

@@ -23,6 +23,8 @@
 #include <cpu/x86/msr.h>
 
 #define MCI_STATUS			0x00000401
+#define MSR_SMM_BASE			0xC0010111
+#define MSR_SMM_MASK			0xC0010113
 #define HWCR_MSR			0xC0010015
 #define NB_CFG_MSR			0xC001001f