arch/x86/postcar: Use a separate stack for C execution

Add a stack in .bss for C execution. This will make it easier to move
the setup of MTRRs in C code.

Change-Id: I67cbc988051036b1a0519cec9ed614acede31fd7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54298
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

src/arch/x86/exit_car.S

@@ -35,6 +35,18 @@ post_car_stack_top:
 .endm
 #endif
 
+/* Place the stack in the bss section. It's not necessary to define it in the
+ * the linker script. */
+	.section .bss, "aw", @nobits
+.global _stack
+.global _estack
+.global _stack_size
+
+_stack:
+.space CONFIG_STACK_SIZE
+_estack:
+.set _stack_size, _estack - _stack
+
 .text
 .global _start
 _start:
@@ -174,8 +186,10 @@ skip_clflush:
 	wrmsr
 #endif /* CONFIG_SOC_SETS_MSRS */
 
+	movl	$_estack, %esp
 	/* Align stack to 16 bytes at call instruction. */
 	andl	$0xfffffff0, %esp
+
 	/* Call into main for postcar. */
 	call main
 	/* Should never return. */

src/drivers/intel/fsp1_1/exit_car.S

@@ -7,7 +7,7 @@ chipset_teardown_car:
 
 	pop	%ebx
 	/* Move the stack pointer to real RAM */
-	movl	post_car_stack_top, %esp
+	movl	_estack, %esp
 	/* Align the stack 16 bytes */
 	andl	$0xfffffff0, %esp
 

src/soc/intel/common/block/cpu/car/exit_car_fsp.S

@@ -17,7 +17,7 @@
 chipset_teardown_car:
 
 	/* Set up new stack. */
-	mov	post_car_stack_top, %esp
+	mov	_estack, %esp
 	/* Align the stack. */
 	andl	$0xfffffff0, %esp