src/.../Kconfig: various small fixes to texts
Fixed spelling and added empty lines to separate the help from the text automatically added during make menuconfig. Change-Id: I6eee2c86e30573deb8cf0d42fda8b8329e1156c7 Signed-off-by: Daniele Forsi <dforsi@gmail.com> Reviewed-on: http://review.coreboot.org/6313 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
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Patrick Georgi
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@@ -46,10 +46,10 @@ config XIP_ROM_SIZE
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default 0x100000
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help
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Overwride the default write through caching size as 1M Bytes.
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On some AMD paltform, one socket support 2 or more kinds of
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processor family, compiling several cpu families agesa code
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On some AMD platforms, one socket supports 2 or more kinds of
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processor family, compiling several CPU families agesa code
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will increase the romstage size.
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In order to execute romstage in place on the flash rom,
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In order to execute romstage in place on the flash ROM,
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more space is required to be set as write through caching.
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config UDELAY_LAPIC_FIXED_FSB
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@@ -126,7 +126,7 @@ config PARALLEL_MP
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config BACKUP_DEFAULT_SMM_REGION
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def_bool n
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help
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The cpu support will select this option if the default SMM region
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The CPU support will select this option if the default SMM region
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needs to be backed up for suspend/resume purposes.
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config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING
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@@ -135,5 +135,5 @@ config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING
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On certain platforms a boot speed gain can be realized if mirroring
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the payload data stored in non-volatile storage. On x86 systems the
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payload would typically live in a memory-mapped SPI part. Copying
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the SPI contents to ram before performing the load can speed up
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the SPI contents to RAM before performing the load can speed up
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the boot process.
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