src/.../Kconfig: various small fixes to texts

Fixed spelling and added empty lines to separate the help
from the text automatically added during make menuconfig.

Change-Id: I6eee2c86e30573deb8cf0d42fda8b8329e1156c7
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6313
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Daniele Forsi
2014-07-22 18:00:56 +02:00
committed by Patrick Georgi
parent e34a6275ee
commit 53847a211b
10 changed files with 30 additions and 21 deletions

View File

@@ -46,10 +46,10 @@ config XIP_ROM_SIZE
default 0x100000
help
Overwride the default write through caching size as 1M Bytes.
On some AMD paltform, one socket support 2 or more kinds of
processor family, compiling several cpu families agesa code
On some AMD platforms, one socket supports 2 or more kinds of
processor family, compiling several CPU families agesa code
will increase the romstage size.
In order to execute romstage in place on the flash rom,
In order to execute romstage in place on the flash ROM,
more space is required to be set as write through caching.
config UDELAY_LAPIC_FIXED_FSB

View File

@@ -126,7 +126,7 @@ config PARALLEL_MP
config BACKUP_DEFAULT_SMM_REGION
def_bool n
help
The cpu support will select this option if the default SMM region
The CPU support will select this option if the default SMM region
needs to be backed up for suspend/resume purposes.
config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING
@@ -135,5 +135,5 @@ config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING
On certain platforms a boot speed gain can be realized if mirroring
the payload data stored in non-volatile storage. On x86 systems the
payload would typically live in a memory-mapped SPI part. Copying
the SPI contents to ram before performing the load can speed up
the SPI contents to RAM before performing the load can speed up
the boot process.