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intel/common/block: Provide RAPL and min clock ratio switches in common

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There are two APL specific config switches for RAPL and min. cpu clock
(APL_SKIP_SET_POWER_LIMITS, APL_SET_MIN_CLOCK_RATIO). These switches
could be used in future in other CPU platforms. Move them to common code
instead of having them just for one SOC.

Test: Make sure that the clock ratio (MSR 0x198) and the RAPL settings
(MSR0x610) do not change with this patch applied on mc_apl{1,4,5}
mainboard.

Change-Id: I3d63d1b9b6c96586a3c20bf8c1d8001b1d7c4bed
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Uwe Poeche
2022-03-28 12:39:01 +02:00
committed by Felix Held
parent db9873b69c
commit 539fd2ac5a
9 changed files with 26 additions and 27 deletions
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4
src/soc/intel/apollolake/cpu.c
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@@ -79,11 +79,11 @@ void soc_core_init(struct device *cpu)
enable_pm_timer_emulation();
/* Set Max Non-Turbo ratio if RAPL is disabled. */
if (CONFIG(APL_SKIP_SET_POWER_LIMITS)) {
if (CONFIG(SOC_INTEL_DISABLE_POWER_LIMITS)) {
cpu_set_p_state_to_max_non_turbo_ratio();
/* Disable speed step */
cpu_set_eist(false);
} else if (CONFIG(APL_SET_MIN_CLOCK_RATIO)) {
} else if (CONFIG(SOC_INTEL_SET_MIN_CLOCK_RATIO)) {
cpu_set_p_state_to_min_clock_ratio();
/* Disable speed step */
cpu_set_eist(false);