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cpuid: Add helper function for cpuid(1) functions

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This patch introduces 3 helper function for cpuid(1) :

1. cpu_get_cpuid() -> to get processor id (from cpuid.eax)
2. cpu_get_feature_flags_ecx -> to get processor feature flag (from cpuid.ecx)
3. cpu_get_feature_flags_edx -> to get processor feature flag (from cpuid.edx)

Above 3 helper functions are targeted to replace majority of cpuid(1)
references.

Change-Id: Ib96a7c79dadb1feff0b8d58aa408b355fbb3bc50
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/30123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Subrata Banik
2018-12-10 14:11:35 +05:30
parent e3110b8620
commit 53b08c347f
21 changed files with 142 additions and 86 deletions
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7
src/soc/intel/broadwell/cpu.c
View File

@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <string.h>
#include <arch/acpi.h>
#include <arch/cpu.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
@@ -498,12 +499,12 @@ static void enable_lapic_tpr(void)
static void configure_dca_cap(void)
{
struct cpuid_result cpuid_regs;
uint32_t feature_flag;
msr_t msr;
/* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */
cpuid_regs = cpuid(1);
if (cpuid_regs.ecx & (1 << 18)) {
feature_flag = cpu_get_feature_flags_ecx();
if (feature_flag & CPUID_DCA) {
msr = rdmsr(IA32_PLATFORM_DCA_CAP);
msr.lo |= 1;
wrmsr(IA32_PLATFORM_DCA_CAP, msr);

15
src/soc/intel/broadwell/romstage/report_platform.c
View File

@@ -86,7 +86,7 @@ static struct {
static void report_cpu_info(void)
{
struct cpuid_result cpuidr;
u32 i, index;
u32 i, index, cpu_id, cpu_feature_flag;
char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */
int vt, txt, aes;
msr_t microcode_ver;
@@ -114,12 +114,12 @@ static void report_cpu_info(void)
microcode_ver.lo = 0;
microcode_ver.hi = 0;
wrmsr(IA32_BIOS_SIGN_ID, microcode_ver);
cpuidr = cpuid(1);
cpu_id = cpu_get_cpuid();
microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */
for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
if (cpu_table[i].cpuid == cpuidr.eax) {
if (cpu_table[i].cpuid == cpu_id) {
cpu_type = cpu_table[i].name;
break;
}
@@ -127,11 +127,12 @@ static void report_cpu_info(void)
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
cpuidr.eax, cpu_type, microcode_ver.hi);
cpu_id, cpu_type, microcode_ver.hi);
aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0;
txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0;
vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0;
cpu_feature_flag = cpu_get_feature_flags_ecx();
aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
printk(BIOS_DEBUG, "CPU: AES %ssupported, TXT %ssupported, "
"VT %ssupported\n", mode[aes], mode[txt], mode[vt]);
}

15
src/soc/intel/cannonlake/bootblock/report_platform.c
View File

@@ -96,7 +96,7 @@ static uint16_t get_dev_id(pci_devfn_t dev)
static void report_cpu_info(void)
{
struct cpuid_result cpuidr;
u32 i, index;
u32 i, index, cpu_id, cpu_feature_flag;
char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */
int vt, txt, aes;
msr_t microcode_ver;
@@ -128,12 +128,12 @@ static void report_cpu_info(void)
microcode_ver.lo = 0;
microcode_ver.hi = 0;
wrmsr(BIOS_SIGN_ID, microcode_ver);
cpuidr = cpuid(1);
cpu_id = cpu_get_cpuid();
microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */
for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
if (cpu_table[i].cpuid == cpuidr.eax) {
if (cpu_table[i].cpuid == cpu_id) {
cpu_type = cpu_table[i].name;
break;
}
@@ -141,11 +141,12 @@ static void report_cpu_info(void)
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
cpuidr.eax, cpu_type, microcode_ver.hi);
cpu_id, cpu_type, microcode_ver.hi);
aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0;
txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0;
vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0;
cpu_feature_flag = cpu_get_feature_flags_ecx();
aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
printk(BIOS_DEBUG,
"CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
mode[aes], mode[txt], mode[vt]);

7
src/soc/intel/cannonlake/cpu.c
View File

@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <arch/cpu.h>
#include <console/console.h>
#include <device/pci.h>
#include <chip.h>
@@ -104,12 +105,12 @@ static void enable_lapic_tpr(void)
static void configure_dca_cap(void)
{
struct cpuid_result cpuid_regs;
uint32_t feature_flag;
msr_t msr;
/* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */
cpuid_regs = cpuid(1);
if (cpuid_regs.ecx & (1 << 18)) {
feature_flag = cpu_get_feature_flags_ecx();
if (feature_flag & CPUID_DCA) {
msr = rdmsr(IA32_PLATFORM_DCA_CAP);
msr.lo |= 1;
wrmsr(IA32_PLATFORM_DCA_CAP, msr);

8
src/soc/intel/common/block/vmx/vmx.c
View File

@@ -11,8 +11,10 @@
* GNU General Public License for more details.
*/
#include <arch/cpu.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/msr.h>
#include <intelblocks/vmx.h>
#include <soc/cpu.h>
@@ -46,11 +48,11 @@ static int soc_vmx_enabled(void)
void vmx_configure(void *unused)
{
msr_t msr;
struct cpuid_result regs;
uint32_t feature_flag;
regs = cpuid(1);
feature_flag = cpu_get_feature_flags_ecx();
if (!soc_vmx_enabled() || !(regs.ecx & CPUID_VMX)) {
if (!soc_vmx_enabled() || !(feature_flag & CPUID_VMX)) {
printk(BIOS_ERR, "VMX: pre-conditions not met\n");
return;
}

15
src/soc/intel/icelake/bootblock/report_platform.c
View File

@@ -92,7 +92,7 @@ static uint16_t get_dev_id(pci_devfn_t dev)
static void report_cpu_info(void)
{
struct cpuid_result cpuidr;
u32 i, index;
u32 i, index, cpu_id, cpu_feature_flag;
char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */
int vt, txt, aes;
msr_t microcode_ver;
@@ -124,12 +124,12 @@ static void report_cpu_info(void)
microcode_ver.lo = 0;
microcode_ver.hi = 0;
wrmsr(BIOS_SIGN_ID, microcode_ver);
cpuidr = cpuid(1);
cpu_id = cpu_get_cpuid();
microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */
for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
if (cpu_table[i].cpuid == cpuidr.eax) {
if (cpu_table[i].cpuid == cpu_id) {
cpu_type = cpu_table[i].name;
break;
}
@@ -137,11 +137,12 @@ static void report_cpu_info(void)
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
cpuidr.eax, cpu_type, microcode_ver.hi);
cpu_id, cpu_type, microcode_ver.hi);
aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0;
txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0;
vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0;
cpu_feature_flag = cpu_get_feature_flags_ecx();
aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
printk(BIOS_DEBUG,
"CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
mode[aes], mode[txt], mode[vt]);

7
src/soc/intel/icelake/cpu.c
View File

@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <arch/cpu.h>
#include <console/console.h>
#include <device/pci.h>
#include <chip.h>
@@ -105,12 +106,12 @@ static void enable_lapic_tpr(void)
static void configure_dca_cap(void)
{
struct cpuid_result cpuid_regs;
uint32_t feature_flag;
msr_t msr;
/* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */
cpuid_regs = cpuid(1);
if (cpuid_regs.ecx & (1 << 18)) {
feature_flag = cpu_get_feature_flags_ecx();
if (feature_flag & CPUID_DCA) {
msr = rdmsr(IA32_PLATFORM_DCA_CAP);
msr.lo |= 1;
wrmsr(IA32_PLATFORM_DCA_CAP, msr);

9
src/soc/intel/quark/romstage/report_platform.c
View File

@@ -67,14 +67,13 @@ static uint32_t fuse_port_read(uint32_t offset)
static void report_cpu_info(void)
{
struct cpuid_result cpuidr;
const char *cpu_type = "Unknown";
u32 d_variant;
u32 ecc_enabled;
u32 extended_temp;
u32 i;
u8 revision;
u32 secure_boot;
u32 secure_boot, cpu_id;
const char *stepping = "Unknown";
/* Determine if ECC is enabled */
@@ -94,9 +93,9 @@ static void report_cpu_info(void)
extended_temp = 0;
/* Look for string to match the CPU ID value */
cpuidr = cpuid(1);
cpu_id = cpu_get_cpuid();
for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
if ((cpu_table[i].cpuid == cpuidr.eax)
if ((cpu_table[i].cpuid == cpu_id)
&& (cpu_table[i].extended_temp == extended_temp)
&& (cpu_table[i].ecc == ecc_enabled)
&& (cpu_table[i].secure_boot == secure_boot)
@@ -118,7 +117,7 @@ static void report_cpu_info(void)
}
}
printk(BIOS_DEBUG, "CPU: ID %x:%x, %s %s Stepping\n", cpuidr.eax,
printk(BIOS_DEBUG, "CPU: ID %x:%x, %s %s Stepping\n", cpu_id,
revision, cpu_type, stepping);
}

15
src/soc/intel/skylake/bootblock/report_platform.c
View File

@@ -121,7 +121,7 @@ static uint16_t get_dev_id(pci_devfn_t dev)
static void report_cpu_info(void)
{
struct cpuid_result cpuidr;
u32 i, index;
u32 i, index, cpu_id, cpu_feature_flag;
char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */
int vt, txt, aes;
msr_t microcode_ver;
@@ -149,12 +149,12 @@ static void report_cpu_info(void)
microcode_ver.lo = 0;
microcode_ver.hi = 0;
wrmsr(IA32_BIOS_SIGN_ID, microcode_ver);
cpuidr = cpuid(1);
cpu_id = cpu_get_cpuid();
microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */
for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
if (cpu_table[i].cpuid == cpuidr.eax) {
if (cpu_table[i].cpuid == cpu_id) {
cpu_type = cpu_table[i].name;
break;
}
@@ -162,11 +162,12 @@ static void report_cpu_info(void)
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
cpuidr.eax, cpu_type, microcode_ver.hi);
cpu_id, cpu_type, microcode_ver.hi);
aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0;
txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0;
vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0;
cpu_feature_flag = cpu_get_feature_flags_ecx();
aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
printk(BIOS_DEBUG,
"CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
mode[aes], mode[txt], mode[vt]);

7
src/soc/intel/skylake/cpu.c
View File

@@ -16,6 +16,7 @@
*/
#include <assert.h>
#include <arch/cpu.h>
#include <bootstate.h>
#include <console/console.h>
#include <device/device.h>
@@ -333,12 +334,12 @@ static void enable_lapic_tpr(void)
static void configure_dca_cap(void)
{
struct cpuid_result cpuid_regs;
uint32_t feature_flag;
msr_t msr;
/* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */
cpuid_regs = cpuid(1);
if (cpuid_regs.ecx & (1 << 18)) {
feature_flag = cpu_get_feature_flags_ecx();
if (feature_flag & CPUID_DCA) {
msr = rdmsr(IA32_PLATFORM_DCA_CAP);
msr.lo |= 1;
wrmsr(IA32_PLATFORM_DCA_CAP, msr);