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soc/intel/adl: Add Raptor Lake-HX definitions

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Tested by booting System76 Adder WS 3 (addw3) and Serval WS 13 (serw13)
to edk2 payload and then OS.

Ref: Intel Raptor Lake EDS, Volume 1 (#640555, rev. 2.8)
Change-Id: I6098e9121a3afc4160c8a0c96d597e88095fd65d
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Tim Crawford
2023-07-07 09:59:56 -06:00
committed by Felix Held
parent 0bde1829e7
commit 53c6eea2d4
10 changed files with 138 additions and 0 deletions
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12
src/include/device/pci_ids.h
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@@ -4048,6 +4048,10 @@
#define PCI_DID_INTEL_MTL_P_GT2_2 0x7d50
#define PCI_DID_INTEL_MTL_P_GT2_3 0x7d55
#define PCI_DID_INTEL_MTL_P_GT2_4 0x7d60
#define PCI_DID_INTEL_RPL_HX_GT1 0xa788
#define PCI_DID_INTEL_RPL_HX_GT2 0xa78b
#define PCI_DID_INTEL_RPL_HX_GT3 0x4688
#define PCI_DID_INTEL_RPL_HX_GT4 0x468b
#define PCI_DID_INTEL_RPL_S_GT0 0xa79f
#define PCI_DID_INTEL_RPL_S_GT1_1 0xa780
#define PCI_DID_INTEL_RPL_S_GT1_2 0xa782
@@ -4177,6 +4181,14 @@
#define PCI_DID_INTEL_MTL_P_ID_3 0x7d14
#define PCI_DID_INTEL_MTL_P_ID_4 0x7d15
#define PCI_DID_INTEL_MTL_P_ID_5 0x7d16
#define PCI_DID_INTEL_RPL_HX_ID_1 0xa702
#define PCI_DID_INTEL_RPL_HX_ID_2 0xa729
#define PCI_DID_INTEL_RPL_HX_ID_3 0xa728
#define PCI_DID_INTEL_RPL_HX_ID_4 0xa72a
#define PCI_DID_INTEL_RPL_HX_ID_5 0xa719
#define PCI_DID_INTEL_RPL_HX_ID_6 0x4637
#define PCI_DID_INTEL_RPL_HX_ID_7 0x463b
#define PCI_DID_INTEL_RPL_HX_ID_8 0x4647
#define PCI_DID_INTEL_RPL_S_ID_1 0xa700
#define PCI_DID_INTEL_RPL_S_ID_2 0xa701
#define PCI_DID_INTEL_RPL_S_ID_3 0xa703