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soc/intel/broadwell: add ACPI backlight support

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Add framework to generate ACPI methods in SSDT for
screen backlight control. Adjust params for gtt_ methods
to match prototypes in i915.h and avoid conflicts.

To make use of this, individual boards will need to
include default_brightness_levels.asl in their dsdt, as
well as add 'register "gfx" = "GMA_STATIC_DISPLAYS(0)"' to
their devicetree.

Change-Id: If93b7690ef36b5d19ca43957e8a1bef91ec5821d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39941
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier
2016-08-05 02:20:15 -05:00
parent 38641aa8b4
commit 53e24468f0
2 changed files with 16 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/soc/intel/broadwell/chip.h
View File

@@ -15,6 +15,7 @@
#ifndef _SOC_INTEL_BROADWELL_CHIP_H_ #ifndef _SOC_INTEL_BROADWELL_CHIP_H_
#define _SOC_INTEL_BROADWELL_CHIP_H_ #define _SOC_INTEL_BROADWELL_CHIP_H_
#include <drivers/intel/gma/i915.h>
#include <stdint.h> #include <stdint.h>
struct soc_intel_broadwell_config { struct soc_intel_broadwell_config {
@@ -130,6 +131,8 @@ struct soc_intel_broadwell_config {
*/ */
int cdclk; int cdclk;
struct i915_gpu_controller_info gfx;
/* Enable S0iX support */ /* Enable S0iX support */
int s0ix_enable; int s0ix_enable;

18
src/soc/intel/broadwell/igd.c
View File

@@ -24,6 +24,7 @@
#include <string.h> #include <string.h>
#include <reg_script.h> #include <reg_script.h>
#include <cbmem.h> #include <cbmem.h>
#include <drivers/intel/gma/i915.h>
#include <drivers/intel/gma/i915_reg.h> #include <drivers/intel/gma/i915_reg.h>
#include <drivers/intel/gma/libgfxinit.h> #include <drivers/intel/gma/libgfxinit.h>
#include <drivers/intel/gma/opregion.h> #include <drivers/intel/gma/opregion.h>
@@ -258,7 +259,7 @@ u32 map_oprom_vendev(u32 vendev)
static struct resource *gtt_res = NULL; static struct resource *gtt_res = NULL;
static unsigned long gtt_read(unsigned long reg) u32 gtt_read(u32 reg)
{ {
u32 val; u32 val;
val = read32(res2mmio(gtt_res, reg, 0)); val = read32(res2mmio(gtt_res, reg, 0));
@@ -266,7 +267,7 @@ static unsigned long gtt_read(unsigned long reg)
} }
static void gtt_write(unsigned long reg, unsigned long data) void gtt_write(u32 reg, u32 data)
{ {
write32(res2mmio(gtt_res, reg, 0), data); write32(res2mmio(gtt_res, reg, 0), data);
} }
@@ -279,9 +280,8 @@ static inline void gtt_rmw(u32 reg, u32 andmask, u32 ormask)
gtt_write(reg, val); gtt_write(reg, val);
} }
static int gtt_poll(u32 reg, u32 mask, u32 value) int gtt_poll(u32 reg, u32 mask, u32 value)
{ { unsigned int try = GT_RETRY;
unsigned int try = GT_RETRY;
u32 data; u32 data;
while (try--) { while (try--) {
@@ -627,6 +627,13 @@ gma_write_acpi_tables(struct device *const dev, unsigned long current,
return current; return current;
} }
static void gma_generate_ssdt(struct device *dev)
{
const struct soc_intel_broadwell_config *chip = dev->chip_info;
drivers_intel_gma_displays_ssdt_generate(&chip->gfx);
}
static struct device_operations igd_ops = { static struct device_operations igd_ops = {
.read_resources = &pci_dev_read_resources, .read_resources = &pci_dev_read_resources,
.set_resources = &pci_dev_set_resources, .set_resources = &pci_dev_set_resources,
@@ -634,6 +641,7 @@ static struct device_operations igd_ops = {
.init = &igd_init, .init = &igd_init,
.ops_pci = &broadwell_pci_ops, .ops_pci = &broadwell_pci_ops,
.write_acpi_tables = gma_write_acpi_tables, .write_acpi_tables = gma_write_acpi_tables,
.acpi_fill_ssdt = gma_generate_ssdt,
}; };
static const unsigned short pci_device_ids[] = { static const unsigned short pci_device_ids[] = {