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amd/stoneyridge/include/soc: Re-arrange NB IOAPIC definitions

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There's no indication that they are accessed through D0F0. Add a D0F0 header
and move IOAPIC definitions under it. The registers defined to be accessed
through index/data pair should be indented relative to the index/data pair
definition.

BUG=b:117754786
TEST=Build grunt.

Change-Id: If4fb6514bb13f1c944d0e1756d8d9de1f08c99f3
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/29155
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Richard Spiegel
2018-10-16 14:48:46 -07:00
committed by Patrick Georgi
parent ff4f80bc4b
commit 543e01a29c
1 changed files with 22 additions and 20 deletions
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24
src/soc/amd/stoneyridge/include/soc/northbridge.h
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@@ -20,17 +20,7 @@
#include <arch/io.h> #include <arch/io.h>
#include <device/device.h> #include <device/device.h>
/* D1F1 - HDA Configuration Registers */ /* D0F0 - Root Complex */
#define HDA_DEV_CTRL_STATUS 0x60
#define HDA_NO_SNOOP_EN BIT(11)
/* D18F0 - HT Configuration Registers */
#define D18F0_NODE_ID 0x60
#define D18F0_CPU_CNT 0x62 /* BKDG defines as a field in DWORD 0x60 */
# define CPU_CNT_MASK 0x1f /* CpuCnt + 1 = no. CPUs */
#define HT_INIT_CONTROL 0x6c
# define HTIC_BIOSR_DETECT ((1 << 5) | (1 << 9) | (1 << 10))
# define HTIC_COLD_RST_DET BIT(4)
/* NB IOAPIC registers */ /* NB IOAPIC registers */
#define NB_IOAPIC_INDEX 0xf8 #define NB_IOAPIC_INDEX 0xf8
@@ -52,6 +42,18 @@
#define AP_SCRATCH_REG NB_IOAPIC_SCRATCH0 #define AP_SCRATCH_REG NB_IOAPIC_SCRATCH0
/* D1F1 - HDA Configuration Registers */
#define HDA_DEV_CTRL_STATUS 0x60
#define HDA_NO_SNOOP_EN BIT(11)
/* D18F0 - HT Configuration Registers */
#define D18F0_NODE_ID 0x60
#define D18F0_CPU_CNT 0x62 /* BKDG defines as a field in DWORD 0x60 */
# define CPU_CNT_MASK 0x1f /* CpuCnt + 1 = no. CPUs */
#define HT_INIT_CONTROL 0x6c
# define HTIC_BIOSR_DETECT ((1 << 5) | (1 << 9) | (1 << 10))
# define HTIC_COLD_RST_DET BIT(4)
/* D18F1 - Address Map Registers */ /* D18F1 - Address Map Registers */
/* MMIO base and limit */ /* MMIO base and limit */