tree: Drop unused <console/console.h>

Change-Id: Ib1a8fc50217c84e835080c70269ff50fc001392c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81811
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/arch/x86/breakpoint.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include <arch/registers.h>
 #include <arch/breakpoint.h>
-#include <console/console.h>
 #include <types.h>
 
 #define DEBUG_REGISTER_COUNT 4

src/drivers/smmstore/ramstage.c

@@ -4,7 +4,6 @@
 #include <cpu/x86/smm.h>
 #include <commonlib/helpers.h>
 #include <commonlib/region.h>
-#include <console/console.h>
 #include <smm_call.h>
 #include <smmstore.h>
 #include <types.h>

src/drivers/spi/issi.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
-#include <console/console.h>
 #include <commonlib/helpers.h>
 #include <spi_flash.h>
 #include <spi-generic.h>

src/mainboard/bytedance/bd_egs/romstage.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <soc/romstage.h>
 #include <defs_cxl.h>
 #include <defs_iio.h>

src/mainboard/emulation/qemu-riscv/cbmem.c

@@ -3,7 +3,6 @@
 #include <cbmem.h>
 #include <symbols.h>
 #include <ramdetect.h>
-#include <console/console.h>
 
 uintptr_t cbmem_top_chipset(void)
 {

src/mainboard/google/auron/smihandler.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <soc/pm.h>
 #include <ec/google/chromeec/ec.h>

src/mainboard/google/brya/variants/constitution/variant.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <fw_config.h>
 #include <sar.h>
 

src/mainboard/google/corsola/panel.c

@@ -2,7 +2,6 @@
 
 #include <boardid.h>
 #include <cbfs.h>
-#include <console/console.h>
 #include <device/i2c_simple.h>
 #include <edid.h>
 #include <gpio.h>

src/mainboard/google/cyan/smihandler.c

@@ -2,7 +2,6 @@
 
 #include <acpi/acpi.h>
 #include <device/mmio.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include "ec.h"
 #include <ec/google/chromeec/smm.h>

src/mainboard/google/geralt/panel_geralt.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <soc/i2c.h>
 
 #include "gpio.h"

src/mainboard/google/glados/smihandler.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variant.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <ec/google/chromeec/smm.h>
 #include <gpio.h>

src/mainboard/google/guybrush/mainboard.c

@@ -8,7 +8,6 @@
 #include <amdblocks/psp.h>
 #include <amdblocks/xhci.h>
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <drivers/i2c/tpm/chip.h>

src/mainboard/google/herobrine/boardid.c

@@ -4,7 +4,6 @@
 #include <ec/google/chromeec/ec.h>
 #include "board.h"
 #include <commonlib/bsd/cb_err.h>
-#include <console/console.h>
 #include <gpio.h>
 #include <soc/socinfo.h>
 

src/mainboard/google/jecht/smihandler.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <soc/pm.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>

src/mainboard/google/link/smihandler.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/bd82x6x/me.h>

src/mainboard/google/myst/mainboard.c

@@ -5,7 +5,6 @@
 #include <amdblocks/amd_pci_util.h>
 #include <amdblocks/xhci.h>
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <drivers/i2c/tpm/chip.h>

src/mainboard/google/myst/port_descriptors.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <gpio.h>
 #include <soc/platform_descriptors.h>
 #include <types.h>

src/mainboard/google/rambi/smihandler.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 
 #include <ec/google/chromeec/smm.h>

src/mainboard/google/rex/variants/ovis/gpio.c

@@ -10,7 +10,6 @@
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
 #include <soc/gpio.h>
-#include <console/console.h>
 #include <boardid.h>
 
 /* Pad configuration in ramstage */

src/mainboard/google/rex/variants/rex0/gpio.c

@@ -10,7 +10,6 @@
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
 #include <soc/gpio.h>
-#include <console/console.h>
 #include <boardid.h>
 
 /* Pad configuration in ramstage */

src/mainboard/google/skyrim/ec.c

@@ -2,7 +2,6 @@
 
 #include <acpi/acpi.h>
 #include <amdblocks/smi.h>
-#include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
 #include <soc/smi.h>

src/mainboard/google/skyrim/mainboard.c

@@ -6,7 +6,6 @@
 #include <amdblocks/psp.h>
 #include <amdblocks/xhci.h>
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <drivers/i2c/tpm/chip.h>

src/mainboard/google/skyrim/variants/baseboard/smihandler.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/smm.h>

src/mainboard/google/slippy/smihandler.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <southbridge/intel/common/gpio.h>

src/mainboard/intel/kblrvp/smihandler.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <ec/google/chromeec/smm.h>
 #include <soc/iomap.h>

src/mainboard/intel/kunimitsu/smihandler.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <ec/google/chromeec/smm.h>
 #include <soc/iomap.h>

src/mainboard/intel/strago/smihandler.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include "ec.h"
 

src/mainboard/msi/ms7d25/romstage_fsp_params.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <assert.h>
-#include <console/console.h>
 #include <fsp/api.h>
 #include <soc/romstage.h>
 #include <soc/meminit.h>

src/mainboard/msi/ms7e06/romstage_fsp_params.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <assert.h>
-#include <console/console.h>
 #include <fsp/api.h>
 #include <soc/romstage.h>
 #include <soc/meminit.h>

src/mainboard/purism/librem_jsl/bootblock.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootblock_common.h>
-#include <console/console.h>
 #include <delay.h>
 #include <device/pci_ops.h>
 #include <ec/acpi/ec.h>

src/mainboard/purism/librem_jsl/romstage.c

@@ -5,7 +5,6 @@
 #include <soc/meminit.h>
 #include <soc/romstage.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
 
 static const struct mb_cfg board_mem_cfg = {
 	.dq_map[DDR_CH0] = {

src/mainboard/purism/librem_l1um_v2/romstage.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <soc/cnl_memcfg_init.h>
 #include <soc/romstage.h>
 #include <spd_bin.h>

src/mainboard/starlabs/lite/bootblock.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootblock_common.h>
-#include <console/console.h>
 #include <intelblocks/lpc_lib.h>
 #include <soc/gpio.h>
 #include <variants.h>

src/mainboard/starlabs/lite/smbios.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <ec/starlabs/merlin/ec.h>

src/mainboard/starlabs/starbook/variants/kbl/romstage.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <option.h>
 #include <soc/romstage.h>
 #include <spd_bin.h>

src/northbridge/intel/haswell/early_pcie.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
-#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_mmio_cfg.h>
 #include <device/pci_ops.h>

src/northbridge/intel/sandybridge/common.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>

src/soc/amd/common/vboot/vboot_bootblock.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootblock_common.h>
-#include <console/console.h>
 #include <cpu/x86/tsc.h>
 #include <psp_verstage/psp_transfer.h>
 #include <symbols.h>

src/soc/amd/genoa_poc/acpi.c

@@ -7,7 +7,6 @@
 #include <amdblocks/acpimmio.h>
 #include <amdblocks/cpu.h>
 #include <arch/ioapic.h>
-#include <console/console.h>
 #include <device/device.h>
 #include <vendorcode/amd/opensil/genoa_poc/opensil.h>
 

src/soc/amd/genoa_poc/i2c.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/i2c.h>
-#include <console/console.h>
 #include <soc/i2c.h>
 #include <soc/southbridge.h>
 #include "chip.h"

src/soc/intel/common/block/p2sb/ioe_p2sb.c

@@ -2,7 +2,6 @@
 
 #define __SIMPLE_DEVICE__
 
-#include <console/console.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <intelblocks/p2sb.h>

src/soc/intel/common/block/p2sb/p2sb.c

@@ -3,7 +3,6 @@
 #define __SIMPLE_DEVICE__
 
 #include <device/pci_ops.h>
-#include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>

src/soc/intel/meteorlake/pcie_rp.c

@@ -4,7 +4,6 @@
 #include <soc/pci_devs.h>
 #include <soc/pcie.h>
 #include <soc/soc_info.h>
-#include <console/console.h>
 
 static const struct pcie_rp_group mtlp_rp_groups[] = {
 	{ .slot = PCI_DEV_SLOT_PCIE_1, .start = 0, .count = 8, .lcap_port_base = 1 },

src/soc/intel/meteorlake/soc_info.c

@@ -5,7 +5,6 @@
 #include <device/pci_ops.h>
 #include <soc/soc_info.h>
 #include <intelblocks/tcss.h>
-#include <console/console.h>
 
 uint8_t get_max_usb20_port(void)
 {

src/soc/intel/xeon_sp/pch.c

@@ -9,7 +9,6 @@
 #include <soc/bootblock.h>
 #include <soc/pch.h>
 #include <soc/pmc.h>
-#include <console/console.h>
 
 void override_hpet_ioapic_bdf(void)
 {

src/soc/intel/xeon_sp/pmc.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
 #include <intelblocks/pmc.h>

src/soc/intel/xeon_sp/pmutil.c

@@ -7,7 +7,6 @@
 
 #define __SIMPLE_DEVICE__
 
-#include <console/console.h>
 #include <device/pci.h>
 #include <intelblocks/pmclib.h>
 #include <intelblocks/rtc.h>

src/soc/mediatek/common/bl31.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bl31.h>
-#include <console/console.h>
 #include <gpio.h>
 #include <soc/bl31.h>
 

src/soc/mediatek/common/devapc.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
 
-#include <console/console.h>
 #include <soc/devapc.h>
 #include <soc/devapc_common.h>
 

src/soc/mediatek/common/msdc.c

@@ -5,7 +5,6 @@
 #include <assert.h>
 #include <commonlib/bsd/helpers.h>
 #include <commonlib/storage/sd_mmc.h>
-#include <console/console.h>
 #include <delay.h>
 #include <device/mmio.h>
 #include <lib.h>

src/soc/mediatek/mt8186/pmif_spmi.c

@@ -3,7 +3,6 @@
 #include <device/mmio.h>
 #include <soc/pll.h>
 #include <soc/pmif_spmi.h>
-#include <console/console.h>
 
 /* IOCFG_LT, DRV_CFG2 */
 DEFINE_BITFIELD(SPMI_SCL, 14, 12)

src/soc/mediatek/mt8188/lastbus.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <device/mmio.h>
 #include <soc/addressmap.h>
 #include <soc/lastbus_v2.h>

src/soc/mediatek/mt8195/pcie.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
 
-#include <console/console.h>
 #include <device/mmio.h>
 #include <device/resource.h>
 #include <delay.h>

src/soc/sifive/fu740/clock.c

@@ -3,7 +3,6 @@
 // This file is used for setting up clocks and get devices out of reset
 // For more Information see FU740-C000 Manual Chapter 7 Clocking and Reset
 
-#include <console/console.h>
 #include <delay.h>
 #include <device/mmio.h>
 #include <soc/addressmap.h>

src/soc/sifive/fu740/gpio.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <soc/addressmap.h>
 #include <soc/gpio.h>
 #include <stdint.h>