sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

zork: Control DPTC with only Kconfig

Browse Source 
Moving the config value SOC_AMD_COMMON_BLOCK_ACPI_DPTC to
soc/amd/picasso/Kconfig and conditionally enabling it for only Morphius
boards makes the value dptc_tablet_mode_enable redundant.

This CL removes dptc_tablet_mode_enable so DPTC is controlled entirely
with the Kconfig value SOC_AMD_COMMON_BLOCK_ACPI_DPTC. This means DPTC
is only included for boards that actually enable it.

BRANCH=none
BUG=b:217911928
TEST=Build zork

Signed-off-by: Tim Van Patten <timvp@google.com>
Change-Id: Ic54a9bb491234088be8184bec8b09e2e31ffa298
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Tim Van Patten
2022-09-13 14:37:32 -06:00
committed by Felix Held
parent 56776a1ab3
commit 54ce4aa98c
3 changed files with 3 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/soc/amd/picasso/root_complex.c
View File

@ -184,10 +184,7 @@ static void acipgen_dptci(void)
{
const struct soc_amd_picasso_config *config = config_of_soc();
if (!config->dptc_tablet_mode_enable)
return;
/* DPTC is enabled. Always fill out the default DPTC values. */
/* Normal mode DPTC values. */
struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit_degreeC,
config->sustained_power_limit_mW,
config->fast_ppt_limit_mW,
@ -207,7 +204,8 @@ static void acipgen_dptci(void)
static void root_complex_fill_ssdt(const struct device *device)
{
acpi_fill_root_complex_tom(device);
acipgen_dptci();
if (CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC))
acipgen_dptci();
}
static const char *gnb_acpi_name(const struct device *dev)