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Change all clrsetbits_leXX() to clrsetbitsXX()

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This patch changes all existing instances of clrsetbits_leXX() to the
new endian-independent clrsetbitsXX(), after double-checking that
they're all in SoC-specific code operating on CPU registers and not
actually trying to make an endian conversion.

This patch was created by running

 sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g'

across the codebase and cleaning up formatting a bit.

Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Julius Werner
2019-12-02 22:03:27 -08:00
committed by Patrick Georgi
parent 1c37157218
commit 55009af42c
108 changed files with 2022 additions and 2025 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/soc/nvidia/tegra124/dma.c
View File

@@ -82,7 +82,7 @@ struct apb_dma_channel * const dma_claim(void)
* Set global enable bit, otherwise register access to channel
* DMA registers will not be possible.
*/
setbits_le32(&apb_dma->command, APB_COMMAND_GEN);
setbits32(&apb_dma->command, APB_COMMAND_GEN);
for (i = 0; i < ARRAY_SIZE(apb_dma_channels); i++) {
regs = apb_dma_channels[i].regs;
@@ -122,7 +122,7 @@ void dma_release(struct apb_dma_channel * const channel)
return;
}
clrbits_le32(&apb_dma->command, APB_COMMAND_GEN);
clrbits32(&apb_dma->command, APB_COMMAND_GEN);
}
int dma_start(struct apb_dma_channel * const channel)
@@ -130,7 +130,7 @@ int dma_start(struct apb_dma_channel * const channel)
struct apb_dma_channel_regs *regs = channel->regs;
/* Set ENB bit for this channel */
setbits_le32(&regs->csr, APB_CSR_ENB);
setbits32(&regs->csr, APB_CSR_ENB);
return 0;
}
@@ -140,7 +140,7 @@ int dma_stop(struct apb_dma_channel * const channel)
struct apb_dma_channel_regs *regs = channel->regs;
/* Clear ENB bit for this channel */
clrbits_le32(&regs->csr, APB_CSR_ENB);
clrbits32(&regs->csr, APB_CSR_ENB);
return 0;
}