diff --git a/src/mainboard/system76/cfl-h/dsdt.asl b/src/mainboard/system76/cfl-h/dsdt.asl
index 66a98c9d95..a42052f208 100644
--- a/src/mainboard/system76/cfl-h/dsdt.asl
+++ b/src/mainboard/system76/cfl-h/dsdt.asl
@@ -43,7 +43,7 @@ DefinitionBlock(
 	}
 
 	// Chipset specific sleep states
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	Scope (\_SB.PCI0.LPCB) {
 		// PS/2 bus
diff --git a/src/mainboard/system76/cml-u/dsdt.asl b/src/mainboard/system76/cml-u/dsdt.asl
index 66a98c9d95..a42052f208 100644
--- a/src/mainboard/system76/cml-u/dsdt.asl
+++ b/src/mainboard/system76/cml-u/dsdt.asl
@@ -43,7 +43,7 @@ DefinitionBlock(
 	}
 
 	// Chipset specific sleep states
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	Scope (\_SB.PCI0.LPCB) {
 		// PS/2 bus
diff --git a/src/mainboard/system76/thelio-b1/dsdt.asl b/src/mainboard/system76/thelio-b1/dsdt.asl
index ee48035100..38bd40cb32 100644
--- a/src/mainboard/system76/thelio-b1/dsdt.asl
+++ b/src/mainboard/system76/thelio-b1/dsdt.asl
@@ -41,7 +41,7 @@ DefinitionBlock(
 	}
 
 	// Chipset specific sleep states
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	Scope (\_SB.PCI0.LPCB)
 	{
diff --git a/src/mainboard/system76/whl-u/dsdt.asl b/src/mainboard/system76/whl-u/dsdt.asl
index 66a98c9d95..a42052f208 100644
--- a/src/mainboard/system76/whl-u/dsdt.asl
+++ b/src/mainboard/system76/whl-u/dsdt.asl
@@ -43,7 +43,7 @@ DefinitionBlock(
 	}
 
 	// Chipset specific sleep states
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	Scope (\_SB.PCI0.LPCB) {
 		// PS/2 bus