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siemens/mc_apl1: Disable PCI clock outputs on XIO bridge

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This patch disables the unused PCI clock outputs on the XIO2001 PCI
Express to PCI Bridge.

Change-Id: I0b9cf51a713f4ab46e71d250397486d136c26177
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/28284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Mario Scheithauer
2018-08-23 14:48:06 +02:00
committed by Werner Zeh
parent c5cca15cce
commit 56508967d8
2 changed files with 9 additions and 0 deletions
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1
src/include/device/pci_ids.h
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@@ -782,6 +782,7 @@
#define PCI_VENDOR_ID_TI 0x104c
#define PCI_DEVICE_ID_TI_TVP4010 0x3d04
#define PCI_DEVICE_ID_TI_TVP4020 0x3d07
#define PCI_DEVICE_ID_TI_XIO2001 0x8240
#define PCI_DEVICE_ID_TI_1130 0xac12
#define PCI_DEVICE_ID_TI_1031 0xac13
#define PCI_DEVICE_ID_TI_1131 0xac15