soc/intel/{icl,jsl,tgl}: Enable PlatformDebugConsent by Kconfig

This change is mainly to control PlatformDebugConsent FSP UPD.
PlatformDebugConsent is enabled if SOC_INTEL_<SOC>LAKE_DEBUG_CONSENT != 0.
PlatformDebugConsent in FspmUpd.h has the details.

TEST=Able to connect ITP/DCI with target system.

Change-Id: I39fe84025cb2bff186d61b2fcad531db52e2b440
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39152
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
This commit is contained in:
Subrata Banik
2020-02-27 19:39:22 +05:30
parent 3db439eb1a
commit 56626cf5d8
7 changed files with 34 additions and 23 deletions

View File

@@ -186,6 +186,22 @@ config FSP_FD_PATH
depends on FSP_USE_REPO
default "3rdparty/fsp/IceLakeFspBinPkg/Fsp.fd"
config SOC_INTEL_ICELAKE_DEBUG_CONSENT
int "Debug Consent for ICL"
# USB DBC is more common for developers so make this default to 3 if
# SOC_INTEL_DEBUG_CONSENT=y
default 3 if SOC_INTEL_DEBUG_CONSENT
default 0
help
This is to control debug interface on SOC.
Setting non-zero value will allow to use DBC or DCI to debug SOC.
PlatformDebugConsent in FspmUpd.h has the details.
Desired platform debug types are
0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
6:Enable (2-wire DCI OOB), 7:Manual
config ENABLE_DISPLAY_OVER_EXT_PCIE_GFX
bool "Enable display over external PCIE GFX card"
select ALWAYS_LOAD_OPROM