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mainboard/google/guybrush: Update Wake-On-LAN functionality

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The generic wifi driver currently contains a lot of intel specific
functionality that results in it not working properly on AMD platforms.
This commit updates the base device tree to use the generic PCIe driver
instead.

BUG=none
TEST=Ran on nipperkin device, dumped SSDT and checked wakeup sources

Change-Id: Iafbc68c1ae33ccc260889f0b39fc5fe8a59d7aca
Signed-off-by: Robert Zieba <robertzieba@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65990
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Robert Zieba 2022-07-19 11:58:43 -06:00 committed by Martin L Roth
parent 247d034a7a
commit 5725a9b82b
2 changed files with 5 additions and 3 deletions
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2
src/mainboard/google/guybrush/Kconfig
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@ -21,7 +21,7 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVERS_I2C_HID select DRIVERS_I2C_HID
select DRIVERS_PCIE_RTD3_DEVICE select DRIVERS_PCIE_RTD3_DEVICE
select DRIVERS_UART_ACPI select DRIVERS_UART_ACPI
select DRIVERS_WIFI_GENERIC select DRIVERS_PCIE_GENERIC
select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_BOARDID select EC_GOOGLE_CHROMEEC_BOARDID
select EC_GOOGLE_CHROMEEC_ESPI select EC_GOOGLE_CHROMEEC_ESPI

6
src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
View File

@ -227,8 +227,10 @@ chip soc/amd/cezanne
device ref iommu on end device ref iommu on end
device ref gpp_bridge_0 on device ref gpp_bridge_0 on
chip drivers/wifi/generic chip drivers/pcie/generic
register "wake" = "GEVENT_8" register "wake_gpe" = "GEVENT_8"
register "wake_deepest" = "ACPI_S0"
register "name" = ""WLAN""
device pci 00.0 on end device pci 00.0 on end
end end
end # WLAN end # WLAN