drivers/intel/fsp2_0: Add FSP 2.3 support

FSP 2.3 specification introduces following changes:

1. FSP_INFO_HEADER changes
   Updated SpecVersion from 0x22 to 0x23
   Updated HeaderRevision from 5 to 6
   Added ExtendedImageRevision
   FSP_INFO_HEADER length changed to 0x50

2. Added FSP_NON_VOLATILE_STORAGE_HOB2

Following changes are implemented in the patch to support FSP 2.3:

- Add Kconfig option
- Update FSP build binary version info based on ExtendedImageRevision
  field in header
- New NV HOB related changes will be pushed as part of another patch

Signed-off-by: Anil Kumar <anil.kumar.k@intel.com>
Change-Id: Ica1bd004286c785aa8a431f39d8efc69982874c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Anil Kumar
2021-11-11 18:56:21 -08:00
committed by Felix Held
parent ec877d633d
commit 57309d362c
5 changed files with 35 additions and 6 deletions

View File

@ -14,7 +14,9 @@
static uint32_t fsp_hdr_get_expected_min_length(void)
{
if (CONFIG(PLATFORM_USES_FSP2_2))
if (CONFIG(PLATFORM_USES_FSP2_3))
return 80;
else if (CONFIG(PLATFORM_USES_FSP2_2))
return 76;
else if (CONFIG(PLATFORM_USES_FSP2_1))
return 72;
@ -70,6 +72,8 @@ enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob)
hdr->silicon_init_entry_offset = read32(raw_hdr + 68);
if (CONFIG(PLATFORM_USES_FSP2_2))
hdr->multi_phase_si_init_entry_offset = read32(raw_hdr + 72);
if (CONFIG(PLATFORM_USES_FSP2_3))
hdr->extended_fsp_revision = read16(raw_hdr + 76);
return CB_SUCCESS;
}