Revert "vboot2: add verstage"

This reverts commit 320647abda, because it
introduced the following regression.

	$ LANG=C make V=1
	Warning: no suitable GCC for arm.
	Warning: no suitable GCC for aarch64.
	Warning: no suitable GCC for riscv.
	/bin/sh: --: invalid option
	Usage: /bin/sh [GNU long option] [option] ...
	/bin/sh [GNU long option] [option] script-file ...
	GNU long options:
	--debug
	--debugger
	--dump-po-strings
	--dump-strings
	--help
	--init-file
	--login
	--noediting
	--noprofile
	--norc
	--posix
	--rcfile
	--restricted
	--verbose
	--version
	Shell options:
	-ilrsD or -c command or -O shopt_option (invocation only)
	-abefhkmnptuvxBCHP or -o option
	make: -print-libgcc-file-name: Command not found

It also introduced trailing whitespace.

Change-Id: I50ec00a38e24c854fa926357cd24f9286bf4f66f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/8223
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

src/soc/nvidia/tegra124/Kconfig

@@ -2,7 +2,6 @@ config SOC_NVIDIA_TEGRA124
 	bool
 	default n
 	select ARCH_BOOTBLOCK_ARMV4
-	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select HAVE_UART_SPECIAL

src/soc/nvidia/tegra124/Makefile.inc

@@ -20,8 +20,6 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
 bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c
 endif
 
-verstage-y += verstage.c
-
 romstage-y += cbfs.c
 romstage-y += cbmem.c
 romstage-y += clock.c

src/soc/nvidia/tegra124/bootblock.c

@@ -23,13 +23,10 @@
 #include <console/console.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
+
 #include "pinmux.h"
 #include "power.h"
 
-#if CONFIG_VBOOT2_VERIFY_FIRMWARE
-#include "verstage.h"
-#endif
-
 void main(void)
 {
 	void *entry;
@@ -75,11 +72,7 @@ void main(void)
 	power_enable_cpu_rail();
 	power_ungate_cpu();
 
-#if CONFIG_VBOOT2_VERIFY_FIRMWARE
-	entry = (void *)verstage_vboot_main;
-#else
 	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage");
-#endif
 
 	if (entry)
 		clock_cpu0_config_and_reset(entry);

src/soc/nvidia/tegra124/verstage.c

@@ -1,9 +0,0 @@
-#include "verstage.h"
-
-/**
- * Stage entry point
- */
-void vboot_main(void)
-{
-	for(;;);
-}

src/soc/nvidia/tegra124/verstage.h

@@ -1,2 +0,0 @@
-void vboot_main(void);
-void verstage_vboot_main(void);