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src: Typo fix (cosmetic)

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Change-Id: I81985bd2836bdeb369587f170504a8a048ee496b
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/29196
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Peter Lemenkov
2018-10-19 16:57:27 +02:00
committed by Stefan Reinauer
parent 39315985e8
commit 5797b2eb05
9 changed files with 11 additions and 11 deletions
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2
src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12Cpb.c
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@@ -115,7 +115,7 @@ F12IsCpbSupported (
/*---------------------------------------------------------------------------------------*/
/**
* BSC entry point for for enabling Core Performance Boost.
* BSC entry point for enabling Core Performance Boost.
*
* Set up D18F4x15C[BoostSrc] and start the PDMs according to the BKDG.
*

2
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnCpb.c
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@@ -113,7 +113,7 @@ F15TnIsCpbSupported (
/*---------------------------------------------------------------------------------------*/
/**
* BSC entry point for for enabling Core Performance Boost.
* BSC entry point for enabling Core Performance Boost.
*
* Set up D18F4x15C[BoostSrc] and start the PDMs according to the BKDG.
*

2
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.c
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@@ -85,7 +85,7 @@ STATIC CONST UINT16 ROMDATA MmioBaseLimitHiRegOffset[MMIO_REG_PAIR_NUM] = {0x180
/*---------------------------------------------------------------------------------------*/
/**
* BSC entry point for for adding MMIO map
* BSC entry point for adding MMIO map
*
* program MMIO base/limit registers
*

2
src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbCpb.c
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@@ -141,7 +141,7 @@ F16KbIsCpbSupported (
/*---------------------------------------------------------------------------------------*/
/**
* BSC entry point for for enabling Core Performance Boost.
* BSC entry point for enabling Core Performance Boost.
*
* Set up D18F4x15C[BoostSrc] and start the PDMs according to the BKDG.
*

2
src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16MmioMap.c
View File

@@ -85,7 +85,7 @@ STATIC CONST UINT16 ROMDATA MmioLimitLowRegOffset[MMIO_REG_PAIR_NUM] = {0x84, 0x
/*---------------------------------------------------------------------------------------*/
/**
* BSC entry point for for adding MMIO map
* BSC entry point for adding MMIO map
*
* program MMIO base/limit registers
*