soc/skl: set IGD resources only if device is enabled

If the Intel IGD device pci 02.0 is disabled or undefined in
the device tree, then internal graphics pre-allocated memory
and GFX-VT MMIO memory for virtualization won`t be allocated
in the SoC address space.

Thus, patch resolves the FSP-S hang problem on Skylake/ Kaby
Lake processors when the IGD device is disabled. This should
provide to run FSP 2.0-based coreboot on these CPUs families
without integrated graphics card.

The following boards were used for testing:

- Asrock H110M-DVS board (desktop i5-6600) & NVIDIA GTX 1060
  as external GPU.

  Virtualization and GFX 3D acceleration with nouveau driver
  still works well  (tested on VirtualBox 5.1.38 with Ubuntu
  18.04.1 as guest and host OS)

- Intel KBL-R U RVP board (mobile i5-8350u) without GFX.

Payload: tianocore edk2-stable201811-216-g51be9d0.

Change-Id: Id7a0cba582d83e3fe7e8d20342ee219cdd369a53
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32467
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maxim Polyakov
2019-04-25 12:32:15 +03:00
committed by Patrick Georgi
parent 5a69491a01
commit 5806665059
4 changed files with 38 additions and 18 deletions

View File

@@ -42,6 +42,7 @@ bool soc_is_vtd_capable(void)
*/
void soc_add_fixed_mmio_resources(struct device *dev, int *index)
{
struct device *const igd_dev = SA_DEV_IGD;
static const struct sa_mmio_descriptor soc_fixed_resources[] = {
{ PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_SA_PCIEX_LENGTH,
"PCIEXBAR" },
@@ -56,9 +57,14 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources,
ARRAY_SIZE(soc_fixed_resources));
if (!(config && config->ignore_vtd) && soc_is_vtd_capable())
sa_add_fixed_mmio_resources(dev, index, soc_vtd_resources,
ARRAY_SIZE(soc_vtd_resources));
if (!(config && config->ignore_vtd) && soc_is_vtd_capable()) {
if (igd_dev && igd_dev->enabled)
sa_add_fixed_mmio_resources(dev, index,
&soc_gfxvt_mmio_descriptor, 1);
sa_add_fixed_mmio_resources(dev, index,
&soc_vtvc0_mmio_descriptor, 1);
}
}
/*