src/include: Add missing includes

Change-Id: I746ea7805bae553a146130994d8174aa2e189610
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/include/cpu/amd/mtrr.h

@@ -41,6 +41,7 @@
 #if !defined(__ASSEMBLER__)
 
 #include <cpu/x86/msr.h>
+#include <stdint.h>
 
 void amd_setup_mtrrs(void);
 struct device;

src/include/cpu/cpu.h

@@ -2,6 +2,7 @@
 #define CPU_CPU_H
 
 #include <arch/cpu.h>
+#include <stdint.h>
 
 void cpu_initialize(unsigned int cpu_index);
 /* Returns default APIC id based on logical_cpu number or < 0 on failure. */

src/include/cpu/intel/l2_cache.h

@@ -13,6 +13,8 @@
 #ifndef __P6_L2_CACHE_H
 #define __P6_L2_CACHE_H
 
+#include <stdint.h>
+
 #define EBL_CR_POWERON	0x2A
 
 #define BBL_CR_D0	0x88

src/include/cpu/x86/bist.h

@@ -2,6 +2,7 @@
 #define CPU_X86_BIST_H
 
 #include <console/console.h>
+#include <stdint.h>
 
 static inline void report_bist_failure(u32 bist)
 {

src/include/cpu/x86/mp.h

@@ -5,6 +5,8 @@
 
 #include <arch/smp/atomic.h>
 #include <cpu/x86/smm.h>
+#include <stddef.h>
+#include <stdint.h>
 
 #define CACHELINE_SIZE 64
 

src/include/cpu/x86/smi_deprecated.h

@@ -3,6 +3,8 @@
 #ifndef __X86_SMI_DEPRECATED_H__
 #define __X86_SMI_DEPRECATED_H__
 
+#include <stdint.h>
+
 #if CONFIG(PARALLEL_MP) || !CONFIG(HAVE_SMI_HANDLER)
 /* Empty stubs for platforms without SMI handlers. */
 static inline void smm_init(void) { }