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drivers/intel/fsp*: Use newly added post codes for memory param prep

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This change replaces use of post codes 0x34 and 0x36 in fsp drivers to
instead use POST_MEM_PREINIT_PREP_{START,END} to make it easy to
search from where these post codes are generated during boot flow.

Additionally, it adds POST_MEM_PREINIT_PREP_END to fsp2_0 memory_init
to make it consistent with fsp1_1 memory init.

Change-Id: I307ada1679f212c424e9f7ad2c9d254e24f41fd3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/29151
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh
2018-10-16 11:54:37 -07:00
committed by Patrick Georgi
parent 9706359fd8
commit 585210ad58
3 changed files with 6 additions and 4 deletions
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4
src/drivers/intel/fsp1_1/raminit.c
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@ -64,7 +64,7 @@ void raminit(struct romstage_params *params)
* set to NULL. This indicates that the FSP code will use the UPD
* region in the FSP binary.
*/
post_code(0x34);
post_code(POST_MEM_PREINIT_PREP_START);
fsp_header = params->chipset_context;
vpd_ptr = (VPD_DATA_REGION *)(fsp_header->CfgRegionOffset +
fsp_header->ImageBase);
@ -103,7 +103,7 @@ void raminit(struct romstage_params *params)
if (IS_ENABLED(CONFIG_MMA))
setup_mma(&memory_init_params);
post_code(0x36);
post_code(POST_MEM_PREINIT_PREP_END);
/* Display the UPD data */
if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))