src/cpu: Capitalize ROM and RAM

Change-Id: I103167a0c39627bcd2ca1d0d4288eb5df02a6cd2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15935
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/cpu/x86/16bit/entry16.inc

@@ -95,7 +95,7 @@ _start16bit:
 	 *
 	 * Also load an IDT with NULL limit to prevent the 16bit IDT being used
 	 * in protected mode before c_start.S sets up a 32bit IDT when entering
-	 * ram stage. In practise: CPU will shutdown on any exception.
+	 * RAM stage. In practise: CPU will shutdown on any exception.
 	 * See IA32 manual Vol 3A 19.26 Interrupts.
 	 */
 

src/cpu/x86/16bit/reset16.ld

@@ -1,5 +1,5 @@
 /*
- *      _ROMTOP                 : The top of the rom used where we
+ *      _ROMTOP                 : The top of the ROM used where we
  *				  need to put the reset vector.
  */
 

src/cpu/x86/lapic/lapic_cpu_init.c

@@ -88,7 +88,7 @@ static void copy_secondary_start_to_lowest_1M(void)
 		memcpy(lowmem_backup, lowmem_backup_ptr, lowmem_backup_size);
 	}
 
-	/* copy the _secondary_start to the ram below 1M*/
+	/* copy the _secondary_start to the RAM below 1M*/
 	memcpy((unsigned char *)AP_SIPI_VECTOR, (unsigned char *)_secondary_start, code_size);
 
 	printk(BIOS_DEBUG, "start_eip=0x%08lx, code_size=0x%08lx\n",